Renesas R5S72623 Manual De Usuario
Section 14 Realtime Clock
R01UH0134EJ0400 Rev. 4.00
Page 693 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
14.3.16
Control Register 1 (RCR1)
RCR1 is a register that affects carry flags and alarm flags. It also selects whether to generate
interrupts for each flag.
interrupts for each flag.
The CF flag remains undefined until the divider circuit is reset (the RESET and ADJ bits in RCR2
are set to 1). When using the CF flag, make sure to reset the divider circuit beforehand.
are set to 1). When using the CF flag, make sure to reset the divider circuit beforehand.
The AF flag remains undefined until the value is set to an alarm register and a counter. When
using the AF flag, make sure to set the alarm register and counter beforehand.
using the AF flag, make sure to set the alarm register and counter beforehand.
0
1
2
3
4
5
6
7
0
0
0
0
0
0
R
R
R
R
R/W
R/W
R/W
R/W
BIt:
Initial value:
R/W:
CF
Undefined
Undefined
-
-
CIE
AIE
-
-
AF
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
7 CF
Undefined
R/W
Carry
Flag
Status flag that indicates that a carry has occurred. CF
is set to 1 when a count-up to 64-Hz occurs at the
second counter carry or 64-Hz counter read. A count
register value read at this time cannot be guaranteed;
another read is required.
is set to 1 when a count-up to 64-Hz occurs at the
second counter carry or 64-Hz counter read. A count
register value read at this time cannot be guaranteed;
another read is required.
0: No carry of 64-Hz counter by second counter or 64-
Hz counter
[Clearing condition]
When 0 is written to CF
1: Carry of 64-Hz counter by second counter or 64 Hz
counter
[Setting condition]
When the second counter or 64-Hz counter is read
during a carry occurrence by the 64-Hz counter, or 1 is
written to CF.
during a carry occurrence by the 64-Hz counter, or 1 is
written to CF.
6, 5
All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
always be 0.