Renesas R5S72621 Manual De Usuario
Section 25 NAND Flash Memory Controller
R01UH0134EJ0400 Rev. 4.00
Page 1319 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
2 4ECCFA
0
R/(W)* 4-Symbol ECC Uncorrectable Error
Only 0 can be written to this bit.
If five or more errors have been detected, it is regarded
that the errors are uncorrectable and this bit is set to 1.
that the errors are uncorrectable and this bit is set to 1.
0: Indicates that the error is correctable.
1: Indicates that the error is uncorrectable
1 4ECCEND
0
R/(W)* 4-Symbol ECC Error Counting/Correction Pattern
Generation End
Only 0 can be written to this bit.
When set, it indicates that counting of errors or
generation of correction pattern has ended. If both of
bits 4ECCFA and 4ECCEND are set to 1, it indicates
that five or more errors were detected and the
processing has therefore ended without generating a
correction pattern.
generation of correction pattern has ended. If both of
bits 4ECCFA and 4ECCEND are set to 1, it indicates
that five or more errors were detected and the
processing has therefore ended without generating a
correction pattern.
0 4ECCEXST
0
R/(W)* 4-Symbol ECC Correction Execution
When an ECC error is detected, this bit is set and error
counting or generation of correction pattern is executed.
counting or generation of correction pattern is executed.
Generation of correction pattern is executed for a
sector.
sector.
0: Error counting and correction pattern generation is
stopped.
1: Error counting or correction pattern generation is
executed.
If the 4ECCCORRECT bit in FLCMNCR is set to 1,
reading is stopped while 4ECCEXST is set to 1 and
reading is restarted when 4ECCEXST is cleared. Do
not write 0 to this bit until 4ECCEND bit is set to 1.
reading is stopped while 4ECCEXST is set to 1 and
reading is restarted when 4ECCEXST is cleared. Do
not write 0 to this bit until 4ECCEND bit is set to 1.
Note: * Only writing 0 is valid.