Renesas R5S72621 Manual De Usuario
Section 33 Power-Down Modes
R01UH0134EJ0400 Rev. 4.00
Page 1787 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
33.2.9
Software Reset Control Register (SWRSTCR)
SWRSTCR is an 8-bit readable/writable register that controls a software reset for the serial sound
interface and IEBus
interface and IEBus
TM
controller and the operation of the crystal resonator for audio.
Note: When writing to this register, see section 33.4, Usage Notes.
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
0
0
0
0
0
0
0
R/W
R
R
R/W
R/W
R/W
R/W
0
R/W
-
AXT
ALE
ALE
-
SSIF3
SRST
SSIF2
SRST
SSIF0
SRST
SSIF1
SRST
IEB
SRST
Bit Bit
Name
Initial
Value
Value
R/W Description
7
AXTALE
0
R/W
AUDIO_X1 Clock Control
Controls the function of AUDIO_X1 pin.
0: Runs the on-chip crystal oscillator/enables the
external clock input.
1: Halts the on-chip crystal oscillator/disables the
external clock input.
6, 5
All 0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.
4 IEBSRST
0 R/W
IEBus
TM
Controller Software Reset
Controls the IEBus
TM
controller reset with software.
0: The IEBus
TM
controller reset is canceled.
1: The IEBus
TM
controller is reset.
3
SSIF3SRST 0
R/W
Serial Sound Interface Channel 3 Software Reset
Controls the serial sound interface channel 3 reset
with software.
with software.
0: The serial sound interface channel 3 reset is
canceled.
1: The serial sound interface channel 3 is reset.