Renesas R5S72621 Manual De Usuario
Section 10 Direct Memory Access Controller
Page 374 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
10.2
Input/Output Pins
Table 10.1 lists the pin configuration of this module. This module has pins for two channels
(channels 0 and 1*) for external bus use.
(channels 0 and 1*) for external bus use.
Table 10.1 Pin Configuration
Channel Name
Abbreviation I/O
Function
0
DMA transfer request DREQ0
I
DMA transfer request input from an
external device to channel 0
external device to channel 0
DMA transfer request
acknowledge
acknowledge
DACK0
O
DMA transfer request acknowledge
output from channel 0 to an external
device
output from channel 0 to an external
device
DMA transfer end
TEND0
O
DMA transfer end output for channel 0
1
DMA transfer request* DREQ1
I
DMA transfer request input from an
external device to channel 1
external device to channel 1
DMA transfer request
acknowledge*
acknowledge*
DACK1
O
DMA transfer request acknowledge
output from channel 1 to an external
device
output from channel 1 to an external
device
DMA transfer end*
TEND1
O
DMA transfer end output for channel 1
Note: * Pins in channel 1 can be used only in the SH7264 Group.