Renesas R5S72621 Manual De Usuario
Section 16 Renesas Serial Peripheral Interface
Page 792 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
16.3.7
Sequence Status Register (SPSSR)
SPSSR indicates the sequence control status when this module operates in master mode.
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
⎯
⎯
⎯
⎯
⎯
⎯
SPCP1 SPCP0
Bit Bit
Name
Initial
Value
Value
R/W Description
7 to 2
All
0
R
Reserved
The write value should always be 0. Otherwise,
operation cannot be guaranteed.
operation cannot be guaranteed.
1
0
SPCP1
SPCP0
0
0
R
R
Command Pointer
During sequence control, these bits indicate one of
the command registers 0 to 3 (SPCMD0 to
SPCMD3) that is currently pointed to by the pointer.
The relationship between the setting of SPCP1 and
SPCP0 and SPCMD0 to SPCMD3 is shown below.
the command registers 0 to 3 (SPCMD0 to
SPCMD3) that is currently pointed to by the pointer.
The relationship between the setting of SPCP1 and
SPCP0 and SPCMD0 to SPCMD3 is shown below.
For the sequence control, see section 16.4.8 (1) (c),
Sequence Control.
Sequence Control.
00: SPCMD0
01: SPCMD1
10: SPCMD2
11: SPCMD3