Renesas R5S72621 Manual De Usuario

 

Section 17   I

2

C Bus Interface 3 

R01UH0134EJ0400  Rev. 4.00  

 

Page 883 of 2108 

Sep 24, 2014 

 

 

 
SH7262 Group, SH7264 Group 

[10]

No

Yes

RDRF=1 ?

No

Yes

RDRF=1 ?

Last receive

- 1?

Master receive mode

Clear TEND in ICSR

Clear TRS in ICCR1 to 0

Clear TDRE in ICSR

Clear ACKBT in ICIER to 0

Dummy-read ICDRR

Read RDRF in ICSR

Read ICDRR

Set ACKBT in ICIER to 1

Set RCVD in ICCR1 to 1

Read ICDRR

Read RDRF in ICSR

Write 0 to BBSY

and SCP

Read STOP in ICSR

Read ICDRR

Clear RCVD in ICCR1 to 0

Clear MST in ICCR1 to 0

End

No

Yes

STOP=1 ?

No

Yes

[1]  Clear TEND, select master receive mode, and  then clear TDRE. *

1

[2]  Set acknowledge to the transmit device. *

1

 

[3] Dummy-read 

ICDDR. 

*

1

[4]  Wait for 1 byte to be received*

2

[5]  Check  whether it is the (last receive - 1).*

2

[6]  Read the receive data.

[7]  Set acknowledge of the final byte.  Disable continuous reception (RCVD = 1).*

2

[8]  Read the (final byte - 1) of received data.

[9]  Wait for the last byte to be receive.

[10]  Clear the STOP flag.

[11]  Issue the stop condition.

[12]  Wait for the creation of stop condition. 

[13]  Read the last byte of receive data.

[14] Clear RCVD.

[15]  Set slave receive mode. 

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[11]

[12]

[13]

[14]

[15]

Notes:  1.  Make sure that no interrupt will be generated during steps [1] to [3].
            2.  When the (last receive -1) is checked (when step [5] is approved), make  
 

 sure that no interrupt will be generated during steps [4], [5], and [7].

Clear STOP in ICSR

When the size of receive data is only one byte in reception, 
steps [2] to [6] are skipped after step [1], before jumping to step [7]. 
The step [8] is dummy-read in ICDRR.

[Complement]