Intel AT80604004872AA Manual De Usuario
Intel® Xeon® Processor 7500 Datasheet, Volume 1
145
Thermal Specifications
6.3.7.2
Device Discovery
The PECI client is available on all processors, and positive identification of the PECI
revision number can be achieved by issuing the GetDIB() command. Please refer to
revision number can be achieved by issuing the GetDIB() command. Please refer to
for details on GetDIB response formatting.
6.3.7.3
Client Addressing
The PECI client assumes a default base address of 0x30. There are three SKT_ID#
strapping pins that are used to strap each PECI socket to a different node ID (in
addition to defining the processor's socket ID). Since SKT_ID# is active low, strapping
a pin to ground results in value of 1 for that bit of the client ID, and strapping to Vio
results in a value of 0 for that bit. Intel® Xeon® processor 7500 series client addresses
can therefore be strapped for values 0x30 through 0x37. These package pin straps are
evaluated at the assertion of VCCPWRGOOD.
strapping pins that are used to strap each PECI socket to a different node ID (in
addition to defining the processor's socket ID). Since SKT_ID# is active low, strapping
a pin to ground results in value of 1 for that bit of the client ID, and strapping to Vio
results in a value of 0 for that bit. Intel® Xeon® processor 7500 series client addresses
can therefore be strapped for values 0x30 through 0x37. These package pin straps are
evaluated at the assertion of VCCPWRGOOD.
The client address may not be changed after VCCPWRGOOD assertion, until the next
power cycle on the processor. Removal of a processor from its socket or tri-stating a
processor in a MP configuration will have no impact to the remaining non-tri-stated
PECI client address.
power cycle on the processor. Removal of a processor from its socket or tri-stating a
processor in a MP configuration will have no impact to the remaining non-tri-stated
PECI client address.
6.3.7.4
C-States
The Intel® Xeon® processor 7500 series PECI client is fully functional under all core
and package C-states. Support for package C-states is a function of processor SKU and
platform capabilities.
and package C-states. Support for package C-states is a function of processor SKU and
platform capabilities.
Because the Intel® Xeon® processor 7500 series takes aggressive power savings
actions under the deepest C-states, PECI requests may have an impact to platform
power. The impact is documented below:
actions under the deepest C-states, PECI requests may have an impact to platform
power. The impact is documented below:
• Ping(), GetDIB(), GetTemp() and MbxGet() have no measurable impact on
processor power under C-states.
• MbxSend(), PCIConfigRd() and PCIConfigWr() usage under package C-states may
result in increased power consumption because the processor must temporarily
return to a C0 state in order to execute the request. The exact power impact of a
return to a C0 state in order to execute the request. The exact power impact of a
Figure 6-25. PECI Power-up Timeline
B c lk
V io
V io P w r G d
S u p p ly V c c
P w r G d
C P U R E S E T #
Q P I p in s
C o r e e x e c u tio n
Q P I tra in in g
id le
ru n n in g
R e s e t u C o d e
B o o t B IO S
P E C I C lie n t S ta tu s
D N R
F u lly O p e ra tio n a l
P E C I N o d e ID
X
N o d e ID V a lid