Intel D425 AU80610006252AA Manual De Usuario
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AU80610006252AA
Processor Configuration Registers
118
Datasheet
Bit Access Default
Value
Description
39 RO 0b
RESERVED ()
38 RO 0b
RESERVED ()
37:35 RO 000b
Reserved ():
34 RO 0b
RESERVED ()
33:31 RO 000b
DDR Frequency Capability (DDRFC):
This field controls which values may be written
to the Memory Frequency Select field 6:4 of the
Clocking Configuration registers (MCHBAR Offset
C00h). Any attempt to write an unsupported
value will be ignored.
000: Capable of "All" memory frequencies
001: Reserved
010: Reserved
011: Reserved
100: RESERVED ()
101: Capable of up to DDR2 800
110: Capable of up to DDR2 667
111: RESERVED ()
This field controls which values may be written
to the Memory Frequency Select field 6:4 of the
Clocking Configuration registers (MCHBAR Offset
C00h). Any attempt to write an unsupported
value will be ignored.
000: Capable of "All" memory frequencies
001: Reserved
010: Reserved
011: Reserved
100: RESERVED ()
101: Capable of up to DDR2 800
110: Capable of up to DDR2 667
111: RESERVED ()
30:28 RO 000b
RESERVED ()
27:24 RO
1h
CAPID Version (CAPIDV):
This field has the value 0001b to identify the
first revision of the CAPID register definition.
This field has the value 0001b to identify the
first revision of the CAPID register definition.
23:16 RO
08h
CAPID Length (CAPIDL):
This field has the value 08h to indicate the
structure length (8 bytes).
This field has the value 08h to indicate the
structure length (8 bytes).
15:8 RO 00h
Next Capability Pointer (NCP):
This field is hardwired to 00h indicating the end
of the capabilities linked list.
This field is hardwired to 00h indicating the end
of the capabilities linked list.
7:0 RO 09h
Capability Identifier (CAP_ID):
This field has the value 1001b to identify the
CAP_ID assigned by the PCI SIG for vendor
dependent capability pointers.
This field has the value 1001b to identify the
CAP_ID assigned by the PCI SIG for vendor
dependent capability pointers.
1.9.23
MGGC - GMCH Graphics Control Register
B/D/F/Type: 0/2/0/PCI
Address Offset:
52-53h
Default Value:
0030h
Access:
RO;
Size: 16
bits
Bit Access Default
Value
Description
15:10 RO
00h Reserved ():