Intel D425 AU80610006252AA Manual De Usuario
Los códigos de productos
AU80610006252AA
Processor Configuration Registers
Datasheet
141
1.10.14 CAPPOINT - Capabilities Pointer
B/D/F/Type: 0/2/1/PCI
Address Offset:
34h
Default Value:
D0h
Access:
RO;
Size: 8
bits
Bit Access Default
Value
Description
7:0 RO D0h
Capabilities Pointer Value (CPV):
This field contains an offset into the function's
PCI Configuration Space for the first item in the
New Capabilities Linked List, the MSI Capabilities
ID registers at the Power Management capability
at D0h.
This field contains an offset into the function's
PCI Configuration Space for the first item in the
New Capabilities Linked List, the MSI Capabilities
ID registers at the Power Management capability
at D0h.
1.10.15 MINGNT - Minimum Grant
B/D/F/Type: 0/2/1/PCI
Address Offset:
3Eh
Default Value:
00h
Access:
RO;
Size: 8
bits
Bit Access Default
Value
Description
7:0 RO 00h
Minimum Grant Value (MGV):
The IGD does not burst as a PCI compliant
master.
The IGD does not burst as a PCI compliant
master.
1.10.16 MAXLAT - Maximum Latency
B/D/F/Type: 0/2/1/PCI
Address Offset:
Address Offset:
3Fh
Default Value:
00h
Access:
RO;
Size: 8
bits
Bit Access Default
Value
Description
7:0 RO 00h
Maximum Latency Value (MLV):
The IGD has no specific requirements for how
often it needs to access the PCI bus.
The IGD has no specific requirements for how
often it needs to access the PCI bus.