Intel D425 AU80610006252AA Manual De Usuario

Intel

Los códigos de productos

AU80610006252AA

Datasheet

3

Contents

Processor Configuration Registers ........................................................................ 8

Register Terminology .............................................................................. 8

System Address Map ............................................................................ 10

Legacy Address Range ............................................................. 12

Main Memory Address Range (1 MB - TOLUD) ............................. 15

PCI* Memory Address Range (TOLUD - 4 GB) .............................. 18

Main Memory Address Space (4 GB to TOUUD) ............................ 20

PCI Express Configuration Address Space ................................... 21

Graphics Memory Address Ranges ............................................. 22

System Management Mode (SMM) ............................................. 22

Memory Shadowing ................................................................. 25

I/O Address Space................................................................... 25

Memory Controller Decode Rules and Cross-Bridge Address Mapping26

Processor Register Introduction .............................................................. 26

I/O Mapped Registers ........................................................................... 27

PCI Device 0 ........................................................................................ 28

VID - Vendor Identification ....................................................... 30

DID - Device Identification ........................................................ 31

PCICMD - PCI Command .......................................................... 31

PCISTS - PCI Status ................................................................ 33

RID - Revision Identification ..................................................... 35

CC - Class Code ...................................................................... 35

MLT - Master Latency Timer ...................................................... 36

HDR - Header Type .................................................................. 36

SVID - Subsystem Vendor Identification ..................................... 36

SID - Subsystem Identification .................................................. 37

CAPPTR - Capabilities Pointer .................................................... 37

PXPEPBAR - PCI Express Egress Port Base Address ....................... 37

MCHBAR - GMCH Memory Mapped Register Range Base ................ 38

GGC - GMCH Graphics Control Register ...................................... 39

DEVEN - Device Enable ............................................................ 41

PCIEXBAR - PCI Express Register Range Base Address .................. 42

DMIBAR - Root Complex Register Range Base Address .................. 44

PAM0 - Programmable Attribute Map 0 ....................................... 44

PAM1 - Programmable Attribute Map 1 ....................................... 46

PAM2 - Programmable Attribute Map 2 ....................................... 47

PAM3 - Programmable Attribute Map 3 ....................................... 48

PAM4 - Programmable Attribute Map 4 ....................................... 49

PAM5 - Programmable Attribute Map 5 ....................................... 50

PAM6 - Programmable Attribute Map 6 ....................................... 51

LAC - Legacy Access Control ..................................................... 52

REMAPBASE - Remap Base Address Register ............................... 52

REMAPLIMIT - Remap Limit Address Register .............................. 53

SMRAM - System Management RAM Control ................................ 53

ESMRAMC - Extended System Management RAM Control ............... 55

TOM - Top of Memory .............................................................. 56

TOUUD - Top of Upper Usable Dram ........................................... 57

GBSM - Graphics Base of Stolen Memory .................................... 57