Intel LF80550KF0604M Hoja De Datos

Dual-Core Intel® Xeon® Processor 7100 Series Datasheet

6.2.6

THERMTRIP# Signal Pin...........................................................................80

6.2.7

TCONTROL and Fan Speed Reduction ........................................................80

6.2.8

Thermal Diode........................................................................................81

Features ..................................................................................................................83
7.1

Power-On Configuration Options ..........................................................................83

7.2

Clock Control and Low Power States.....................................................................83
7.2.1

Normal State .........................................................................................84

7.2.2

HALT or Enhanced Power Down State ........................................................84

7.2.3

Stop-Grant State ....................................................................................85

7.2.4

Enhanced HALT Snoop State or HALT Snoop State,

Stop Grant Snoop State...........................................................................86

7.3

Enhanced Intel SpeedStep® Technology...............................................................86

7.4

System Management Bus (SMBus) Interface .........................................................87
7.4.1

SMBus Device Addressing ........................................................................88

7.4.2

PIROM and Scratch EEPROM Supported SMBus Transactions.........................90

7.4.3

Processor Information ROM (PIROM) .........................................................90

7.4.4

Checksums .......................................................................................... 109

7.4.5

Scratch EEPROM ................................................................................... 110

7.4.6

SMBus Thermal Sensor.......................................................................... 110

7.4.7

Thermal Sensor Supported SMBus Transactions ........................................ 111

7.4.8

SMBus Thermal Sensor Registers ............................................................ 113

7.4.9

SMBus Thermal Sensor Alert Interrupt..................................................... 116

Boxed Processor Specifications.............................................................................. 117
8.1

Introduction.................................................................................................... 117

8.2

Mechanical Specifications.................................................................................. 118
8.2.1

Boxed Processor Heatsink Dimensions ..................................................... 118

8.2.2

Boxed Processor Heatsink Weight ........................................................... 125

8.2.3

Boxed Processor Retention Mechanism and Heatsink Supports .................... 125

8.3

Thermal Specifications...................................................................................... 125
8.3.1

Boxed Processor Cooling Requirements.................................................... 125

8.3.2

Boxed Processor Contents...................................................................... 126

Debug Tools Specifications .................................................................................... 127
9.1

Logic Analyzer Interface (LAI) ........................................................................... 127
9.1.1

Mechanical Considerations ..................................................................... 127

9.1.2

Electrical Considerations ........................................................................ 127

Figures

2-1

On-Die Front Side Bus Termination ......................................................................18

2-2

Phase Lock Loop (PLL) Filter Requirements............................................................20

2-3

Dual-Core Intel® Xeon® Processor 7100 Series Load Current vs. Time.....................30

2-4

VCC Static and Transient Tolerance ......................................................................32

2-5

VCACHE Static and Transient Tolerance at the Die Sense Location ............................33

2-6

VCACHE Static and Transient Tolerance at the Board ..............................................34

2-7

VCC Overshoot Example Waveform ......................................................................35

2-8

VCACHE Overshoot Example Waveform ................................................................36

3-1

Processor Package Assembly Sketch.....................................................................41

3-2

Processor Package Drawing (Sheet 1 of 2) ............................................................43

3-3

Processor Package Drawing (Sheet 2 of 2) ............................................................44

3-4

Processor Topside Markings.................................................................................47

3-5

Processor Bottom-Side Markings ..........................................................................47

3-6

Processor Pin-Out Coordinates, Top View ..............................................................48

6-1

150W Dual-Core Intel® Xeon® Processor 7100 Series Thermal Profile......................75