Intel SC5400LX Manual De Usuario
Intel® Server Chassis SC5400 5U Kit TPS
Chassis Power Subsystem
Revision: 1.0
49
5.3.5.2 PSKILL
The purpose of the PSKill pin is to allow for hot swapping of the power supply. The mating pin of
this signal on the power distribution board input connector should be tied to ground, and its
resistance shall be less than five ohms.
this signal on the power distribution board input connector should be tied to ground, and its
resistance shall be less than five ohms.
5.3.5.3
PWOK (Power OK) Input and Output Signals
PWOK is a Power Good, 5V TTL compatible, coming from the power supply, active HI logic
signal, which will be pulled HIGH by the power supply to indicate that its +12V output is within
its regulation limits. When its +12V output voltage falls below regulation limits or when AC
power has been removed for a time sufficiently long so that power supply operation is no longer
guaranteed, PWOK will be de-asserted to a LOW state.
signal, which will be pulled HIGH by the power supply to indicate that its +12V output is within
its regulation limits. When its +12V output voltage falls below regulation limits or when AC
power has been removed for a time sufficiently long so that power supply operation is no longer
guaranteed, PWOK will be de-asserted to a LOW state.
5.3.5.4
PSALERT# Output Signal
This signal indicates that the power supply is experiencing a problem that the user should
investigate. This signal from each supply is OR-ed on the power distribution board, and then
becomes one PSALERT# output signal to the system.
investigate. This signal from each supply is OR-ed on the power distribution board, and then
becomes one PSALERT# output signal to the system.
5.4 SMBus Monitoring Interface
The 670W and 830W power supplies are compatible with both SMBus 2.0 ‘high power’ and I
2
C
Vdd based power and drive. This bus operates at 3.3V. The SMBus pull-ups are located on the
server board.
server board.
The SMBus provides power monitoring, failure conditions, warning conditions, and FRU data.
Two pins have been reserved on the connector to provide this information. One pin is the Serial
Clock (PSM Clock). The second pin is used for Serial Data (PSM Data). Both pins are bi-
directional and are used to form a serial bus.
Two pins have been reserved on the connector to provide this information. One pin is the Serial
Clock (PSM Clock). The second pin is used for Serial Data (PSM Data). Both pins are bi-
directional and are used to form a serial bus.
5.4.1 Usage
Modes
There are two usage models depending on the system. The system shall control the usage
model by setting the Usage Mode bit.
model by setting the Usage Mode bit.
5.4.1.1 Default
Mode
In this mode, the LEDs and registers must automatically clear when a warning event has
occurred, because there is no software, BIOS, or other agent that will access the power supply
via the SMBus to do any clearing.
occurred, because there is no software, BIOS, or other agent that will access the power supply
via the SMBus to do any clearing.
5.4.1.2 Intelligent
Mode
A system management controller or BIOS agent exists that can read and clear status. In this
mode, the LEDs and registers should latch when a warning event occurs so that the system and
user can read their status before it changes during transient events. There should also be a
mechanism to allow the system management or BIOS to ‘force’ the LED states in order to
identify which power supply should be replaced.
mode, the LEDs and registers should latch when a warning event occurs so that the system and
user can read their status before it changes during transient events. There should also be a
mechanism to allow the system management or BIOS to ‘force’ the LED states in order to
identify which power supply should be replaced.