SMSC LAN9311 Manual De Usuario
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
217
Revision 1.4 (08-19-08)
DATASHEET
14.2.5.16
1588 Clock Target High-DWORD Register (1588_CLOCK_TARGET_HI)
T h i s r e a d / w r i t e r e g i s t e r c o m b i n e d w i t h
form the 64-bit 1588 Clock Target value. The 1588 Clock Target value
is compared to the current 1588 Clock value and can be used to trigger an interrupt upon at match.
Refer to
Refer to
for additional information.
Note:
Both this register and the
must be written for either to be affected.
Offset:
17Ch
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Clock Target High (CLOCK_TARGET_HI)
This field contains the high 32-bits of the 64-bit 1588 Clock Compare value.
This field contains the high 32-bits of the 64-bit 1588 Clock Compare value.
R/W
00000000h