National Instruments PCI-1200 Manual De Usuario
Chapter 3
Signal Connections
© National Instruments Corporation
3-23
Figure 3-13. EXTUPDATE* Signal Timing for Updating DAC Output
The absolute max voltage input rating for the EXTCONV*, EXTTRIG,
OUTB1, and EXTUPDATE* signals is –0.5 to 5.5 V with respect to
DGND.
OUTB1, and EXTUPDATE* signals is –0.5 to 5.5 V with respect to
DGND.
For more information concerning the various modes of data acquisition and
analog output, refer to your NI-DAQ documentation or to Chapter 4,
analog output, refer to your NI-DAQ documentation or to Chapter 4,
, in this manual.
General Purpose Timing Signal Connections
The general purpose timing signals include the GATE, CLK, and OUT
signals for the three 82C53(B) counters. The 82C53 counter/timers can be
used for general purpose applications such as pulse and square wave
generation, event counting, and pulse-width, time-lapse, and frequency
measurement. For these applications, the CLK and GATE signals at the I/O
connector control the counters. The single exception is counter B0, which
has an internal 2 MHz clock.
signals for the three 82C53(B) counters. The 82C53 counter/timers can be
used for general purpose applications such as pulse and square wave
generation, event counting, and pulse-width, time-lapse, and frequency
measurement. For these applications, the CLK and GATE signals at the I/O
connector control the counters. The single exception is counter B0, which
has an internal 2 MHz clock.
To perform pulse and square wave generation, program a counter to
generate a timing signal at its OUT output pin. To perform event counting,
program a counter to count rising or falling edges applied to any of the
82C53 CLK inputs, then read the counter value to determine the number of
edges that have occurred. You can enable or disable the counting operation
by controlling the gate input. Figure 3-14 shows connections for a typical
event-counting operation in which a switch is used to gate the counter on
and off.
generate a timing signal at its OUT output pin. To perform event counting,
program a counter to count rising or falling edges applied to any of the
82C53 CLK inputs, then read the counter value to determine the number of
edges that have occurred. You can enable or disable the counting operation
by controlling the gate input. Figure 3-14 shows connections for a typical
event-counting operation in which a switch is used to gate the counter on
and off.
t
w
Minimum 50 ns
EXTUPDATE*
DAC OUTPUT
UPDATE
CNTINT
DACWRT
t
w