Getac Technology Corporation V110GD Manual De Usuario
PIC32MX1XX/2XX
DS61168C-page 178
Preliminary
© 2011 Microchip Technology Inc.
bit 4
P:
Stop bit
1
= Indicates that a Stop bit has been detected last
0
= Stop bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop detected.
bit 3
S:
Start bit
1
= Indicates that a Start (or Repeated Start) bit has been detected last
0
= Start bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop detected.
bit 2
R_W:
Read/Write Information bit (when operating as I
2
C slave)
1
= Read – indicates data transfer is output from slave
0
= Write – indicates data transfer is input to slave
Hardware set or clear after reception of I
2
C device address byte.
bit 1
RBF:
Receive Buffer Full Status bit
1
= Receive complete, I2CxRCV is full
0
= Receive not complete, I2CxRCV is empty
Hardware set when I2CxRCV is written with received byte. Hardware clear when software
reads I2CxRCV.
reads I2CxRCV.
bit 0
TBF:
Transmit Buffer Full Status bit
1
= Transmit in progress, I2CxTRN is full
0
= Transmit complete, I2CxTRN is empty
Hardware set when software writes I2CxTRN. Hardware clear at completion of data transmission.
REGISTER 17-2:
I2C
X
STAT: I
2
C™ STATUS REGISTER (CONTINUED)