Getac Technology Corporation V110GD Manual De Usuario
© 2011 Microchip Technology Inc.
Preliminary
DS61168C-page 181
PIC32MX1XX/2XX
bit 5
ABAUD:
Auto-Baud Enable bit
1
= Enable baud rate measurement on the next character – requires reception of Sync character (0x55);
cleared by hardware upon completion
0
= Baud rate measurement disabled or completed
bit 4
RXINV:
Receive Polarity Inversion bit
1
= UxRX Idle state is ‘0’
0
= UxRX Idle state is ‘1’
bit 3
BRGH:
High Baud Rate Enable bit
1
= High-Speed mode – 4x baud clock enabled
0
= Standard Speed mode – 16x baud clock enabled
bit 2-1
PDSEL<1:0>:
Parity and Data Selection bits
11
= 9-bit data, no parity
10
= 8-bit data, odd parity
01
= 8-bit data, even parity
00
= 8-bit data, no parity
bit 0
STSEL:
Stop Selection bit
1
= 2 Stop bits
0
= 1 Stop bit
REGISTER 18-1:
UxMODE: UARTx MODE REGISTER (CONTINUED)
Note 1:
When using 1:1 PBCLK divisor, the user software should not read/write the peripheral SFRs in the
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.