Getac Technology Corporation V110GD Manual De Usuario
© 2011 Microchip Technology Inc.
Preliminary
DS61168C-page 219
PIC32MX1XX/2XX
bit 24
EDG1STAT:
Edge1 Status bit
Indicates the status of Edge1 and can be written to control edge source
1
= Edge1 has occurred
0
= Edge1 has not occurred
bit 23
EDG2MOD:
Edge2 Edge Sampling Select bit
1
= Input is edge-sensitive
0
= Input is level-sensitive
bit 22
EDG2POL:
Edge 2 Polarity Select bit
1
= Edge2 programmed for a positive edge response
0
= Edge2 programmed for a negative edge response
bit 21-18 EDG2SEL<3:0>: Edge 2 Source Select bits
1111
= C3OUT pin is selected
1110
= C2OUT pin is selected
1101
= C1OUT pin is selected
1100
= PBCLK clock is selected
1011
= IC3 Capture Event is selected
1010
= IC2 Capture Event is selected
1001
= IC1 Capture Event is selected
1000
= CTED13 pin is selected
0111
= CTED12 pin is selected
0110
= CTED11 pin is selected
0101
= CTED10 pin is selected
0100
= CTED9 pin is selected
0011
= CTED1 pin is selected
0010
= CTED2 pin is selected
0001
= OC1 Compare Event is selected
0000
= Timer1 Event is selected
bit 17-16 Unimplemented: Read as ‘0’
bit 15
bit 15
ON:
ON Enable bit
1
= Module is enabled
0
= Module is disabled
bit 14
Unimplemented:
Read as ‘0’
bit 13
CTMUSIDL:
Stop in Idle Mode bit
1
= Discontinue module operation when device enters Idle mode
0
= Continue module operation in Idle mode
bit 12
TGEN:
Time Generation Enable bit
(1)
1
= Enables edge delay generation
0
= Disables edge delay generation
bit 11
EDGEN:
Edge Enable bit
1
= Edges are not blocked
0
= Edges are blocked
REGISTER 24-1:
CTMUCON: CTMU CONTROL REGISTER (CONTINUED)
Note 1:
When this bit is set for Pulse Delay Generation, the EDG2SEL<2:0> bits must be set to ‘1110’ to select
C2OUT.
C2OUT.
2:
The ADC module Sample and Hold capacitor is not automatically discharged between sample/conversion
cycles. Software using the ADC as part of a capacitive measurement, must discharge the ADC capacitor
before conducting the measurement. The IDISSEN bit, when set to ‘1’, performs this function. The ADC
module must be sampling while the IDISSEN bit is active to connect the discharge sink to the capacitor
array.
cycles. Software using the ADC as part of a capacitive measurement, must discharge the ADC capacitor
before conducting the measurement. The IDISSEN bit, when set to ‘1’, performs this function. The ADC
module must be sampling while the IDISSEN bit is active to connect the discharge sink to the capacitor
array.
3:
Refer to the CTMU Current Source Specifications (
Table 29-39
) in
Section 29.0 “Electrical
Characteristics”
for current values.
4:
This bit setting is not available for the CTMU temperature diode.