Getac Technology Corporation V110GD Manual De Usuario

PIC32MX1XX/2XX

DS61168C

-page 58

Prelimina

2011 Microchip T

echnolo

gy Inc.

TABLE 4-15:

FLASH CONTROLLER REGISTER MAP

irtual Address

(BF80_#

)

Regis

ter

Bit Range

Bits

All

set

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

F400 NVMCON

(1)

31:16

—

0000

15:0

WREN

WRERR

LVDERR LVDSTAT

—

NVMOP<3:0>

0000

F410

NVMKEY

31:16

NVMKEY<31:0>

0000

15:0

0000

F420 NVMADDR

(1)

31:16

NVMADDR<31:0>

0000

15:0

0000

F430 NVMDATA

31:16

NVMDATA<31:0>

0000

15:0

0000

F440

NVMSRC

ADDR

31:16

NVMSRCADDR<31:0>

0000

15:0

0000

Legend:

= unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

This register has corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

Section 11.2 “CLR, SET and INV Registers”

for more

information.