Compal Electronics Inc PICONODE Manual De Usuario
PicoNode Integration Specification
6
Pin #
Pin Name
Signal Direction
Relative to picoNode
Relative to picoNode
Signal Type
Comment
8
SRQ
Output
CMOS_O
SPI Slave Request. SRQ must be
connected to a pin that can wake
the application processor from
sleep, for battery powered
applications.
connected to a pin that can wake
the application processor from
sleep, for battery powered
applications.
9
SRDY
Output
CMOS_O
SPI Slave Ready
21
SCLK
Input
CMOS_I
SPI Clock
19
MISO
Output
CMOS_O
SPI Master Input Slave Output
22
CS
Input
CMOS_I
SPI Chip Select(Note other slaves
are prohibited on the SPI interface,
but this pin must be controlled by
the Host Common Library). It
CANNOT be tied low on the PCB.
are prohibited on the SPI interface,
but this pin must be controlled by
the Host Common Library). It
CANNOT be tied low on the PCB.
20
MOSI
Input
CMOS_I
SPI Master Output Slave Input
11
MRQ
Input
CMOS_I
SPI Master Request
13
ON_OFF
Input
CMOS_A
This is used to turn ON/OFF the
Internal Power supplies of the
picoNode. It is controlled by the
Host Common Library.
Internal Power supplies of the
picoNode. It is controlled by the
Host Common Library.
Low: Node consumes <1uA
High: Node is active and will run
through a wide range of power
states.
states.
17
TOUT
Output
CMOS_O
TOUT is a normally low signal that
pulses high in response to specific
Network Timing Events. It allows an
application to trigger a
measurement with sub-1ms
accuracy.
pulses high in response to specific
Network Timing Events. It allows an
application to trigger a
measurement with sub-1ms
accuracy.
6
RF_TXENA
Output
CMOS_O
This signal is used to indicate status
of the Power Amplifier for the
picoNode:
of the Power Amplifier for the
picoNode:
Low = OFF
High = Enabled (Transmitting)
The rise edge can be used to trigger
a Host CPU’s ADC read of VBATT
(battery voltage while under
maximum load).
a Host CPU’s ADC read of VBATT
(battery voltage while under
maximum load).