GatesAir Inc. CZF Manual De Usuario
APEX
™
Exciter Incorporating FLO
™
Technology
Exciter Troubleshooting
Maintenance and Troubleshooting
26
04s50
0.fm
03/08/07
888-2604-001
Page: 5-23
WARNING: Disconnect primary power prior to servicing.
If the above test is passed and the front panel indicates output power (exciter not muted)
but no power is present at exciter rear panel output connector, the problem could be with
the output amplifier mute circuit, the UDC board mute circuit or cable W3, which connects
the amplifier output connector J2 to the RF output connector on the exciter rear panel.
Since the RF sample for the above mentioned test is taken from the output of the output
amplifier, the fact that the test was successful and the front panel indicated the presence of
output power proves that the amplifier was operating up to the RF sample and detector
outputs. Refer to Figure 4-10, on page 4-13, for a block diagram of the output amplifier.
but no power is present at exciter rear panel output connector, the problem could be with
the output amplifier mute circuit, the UDC board mute circuit or cable W3, which connects
the amplifier output connector J2 to the RF output connector on the exciter rear panel.
Since the RF sample for the above mentioned test is taken from the output of the output
amplifier, the fact that the test was successful and the front panel indicated the presence of
output power proves that the amplifier was operating up to the RF sample and detector
outputs. Refer to Figure 4-10, on page 4-13, for a block diagram of the output amplifier.
The amplifier mute circuit operates a relay which connects the amplifier output to
connector J2 (RF output) on the amplifier board when not muted and connects the amplifier
output to connector J3 (RF load) when muted. The mute signal comes in at amplifier
connector J5 pin 7, unmuted = +4 Vdc and muted = 0 Vdc.
connector J2 (RF output) on the amplifier board when not muted and connects the amplifier
output to connector J3 (RF load) when muted. The mute signal comes in at amplifier
connector J5 pin 7, unmuted = +4 Vdc and muted = 0 Vdc.
5.8.6
Isolating a Faulty Board in the Digital Tray
Isolating a faulty board in the digital tray involves checking the status screens of the boards
for faults, knowing which board diagnostics screen functions to use, and knowing how to
monitor the signal flow through the boards. Each board in the digital tray is discussed
below.
for faults, knowing which board diagnostics screen functions to use, and knowing how to
monitor the signal flow through the boards. Each board in the digital tray is discussed
below.
5.8.6.1
Modulator Board
The ASI input transport streams come from J2 and J3 on the exciter rear panel. Data leaves
J10 of the Modulator board as a 32 bit complex baseband signal. It goes through the
controller board (enters at J1 and leaves at J2) and goes to P1 of the adaptive precorrector
board. The controller board samples this throughput data and saves it in the BIT memory.
J10 of the Modulator board as a 32 bit complex baseband signal. It goes through the
controller board (enters at J1 and leaves at J2) and goes to P1 of the adaptive precorrector
board. The controller board samples this throughput data and saves it in the BIT memory.
If the transport stream is missing, the modulator board will still put out a signal with null
packets which are randomized and processed. To determine if the modulator board is
putting out a digitized modulated signal, do the following.
packets which are randomized and processed. To determine if the modulator board is
putting out a digitized modulated signal, do the following.
Select display setup > chart source > FLO Ref or C.
On main screen, check the FLO REF or C (chart source) memory (selected from the chart
source of the display setup screen) for a correct spectrum.
source of the display setup screen) for a correct spectrum.
A
The FLO Ref (chart source) memory is the FLO I and Q signal from the
FPGA board.
FPGA board.
B
The C (chart source) memory is the FLO real signal from the FPGA board.