Intel i7-3920XM Extreme AW8063801009607 Manual De Usuario
Los códigos de productos
AW8063801009607
Datasheet, Volume 2
183
Processor Configuration Registers
1:0
RW
00b
Uncore
Power State (PS)
This field indicates the current power state of this device and can
This field indicates the current power state of this device and can
be used to set the device into a new power state. If software
attempts to write an unsupported state to this field, write
operation must complete normally on the bus, but the data is
discarded and no state change occurs.
00 = D0
01 = D1 (Not supported in this device.)
10 = D2 (Not supported in this device.)
11 = D3
Support of D3cold does not require any special action.
While in the D3hot state, this device can only act as the target of
00 = D0
01 = D1 (Not supported in this device.)
10 = D2 (Not supported in this device.)
11 = D3
Support of D3cold does not require any special action.
While in the D3hot state, this device can only act as the target of
PCI configuration transactions (for power management control).
This device also cannot generate interrupts or respond to MMR
cycles in the D3 state. The device must return to the D0 state in
order to be fully-functional.
When the Power State is other than D0, the bridge will Master
When the Power State is other than D0, the bridge will Master
Abort (that is, not claim) any downstream cycles (with exception
of type 0 configuration cycles). Consequently, these unclaimed
cycles will go down DMI and come back up as Unsupported
Requests, which the processor logs as Master Aborts in Device 0
PCISTS[13]
There is no additional hardware functionality required to support
There is no additional hardware functionality required to support
these Power States.
B/D/F/Type:
0/6/0/PCI
Address Offset:
84–87h
Reset Value:
00000008h
Access:
RO, RW
Size:
32 bits
BIOS Optimal Default
000000h
Bit
Access
Reset
Value
RST/
PWR
Description