Intel G1620T CM8063701448300 Manual De Usuario
Los códigos de productos
CM8063701448300
PCU - iLB - High Precision Event Timers (HPET)
1234
Datasheet
27.5.3
GIS (HPET_GIS)—Offset FED00020h
General Interrupt Status
Access Method
Default: 0000000000000000h
27.5.4
MCV (HPET_MCV)—Offset FED000F0h
Main Counter Value
Access Method
Default: 0000000000000000h
Type: Memory Mapped I/O Register
(Size: 64 bits)
HPET_GIS: FED00020h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SERV
ED
T2 T1 T0
Bit
Range
Default &
Access
Description
63:3
0b
RO
RESERVED: Reserved.
2
0b
RW
T2: Timer 2 Status (T2): Same functionality as T0, for timer 2.
1
0b
RW
T1: Timer 1 Status (T1): Same functionality as T0, for timer 1.
0
0b
RW
T0: Timer 0 Status (T0): In edge triggered mode, this bit always reads as 0. In level
triggered mode, this bit is set when an interrupt is active.
Type: Memory Mapped I/O Register
(Size: 64 bits)
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CV
Bit
Range
Default &
Access
Description
63:0
0b
RW
CV: Counter Value (CV): Reads return the current value of the counter. Writes load the
new value to the counter. Timers 1 and 2 return 0 for the upper 32-bits of this register.