Intel E7-8891 v2 CM8063601377422 Manual De Usuario

104

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

Datasheet Volume Two: Functional Description, February 2014

31:31

RO_V

0x0

SMB_RDO (smb_rdo):

Read Data Valid
This bit is set by iMC when the Data field of this register receives read data 

from the SPD/TSOD after completion of an SMBus read command. It is 

cleared by iMC when a subsequent SMBus read command is issued.

30:30

RO_V

0x0

SMB_WOD (smb_wod):

Write Operation Done
This bit is set by iMC when a SMBus Write command has been completed on 

the SMBus. It is cleared by iMC when a subsequent SMBus Write command 

is issued.

29:29

RO_V

0x0

SMB_SBE (smb_sbe):

SMBus Error
This bit is set by iMC if an SMBus transaction (including the TSOD polling or 

message channel initiated SMBus access) that does not complete 

successfully (non-Ack has been received from slave at expected Ack slot of 

the transfer). If a slave device is asserting clock stretching, IMC does not 

have logic to detect this condition to set the SBE bit directly; however, the 

SMBus master will detect the error at the corresponding transaction's 

expected ACK slot.

Once SMBUS_SBE bit is set, iMC stops issuing hardware initiated TSOD 

polling SMBUS transactions until the SMB_SBE is cleared. iMC will not 

increment the SMB_STAT_x.TSOD_SA until the SMB_SBE is cleared. Manual 

SMBus command interface is not affected, i.e. new command issue will 

clear the SMB_SBE like A0 silicon behavior.

28:28

ROS_V

0x0

SMB_BUSY (smb_busy):

SMBus Busy state. This bit is set by iMC while an SMBus/I2C command 

(including TSOD command issued from IMC hardware) is executing. Any 

transaction that is completed normally or gracefully will clear this bit 

automatically. By setting the SMB_SOFT_RST will also clear this bit.

This register bit is sticky across reset so any surprise reset during pending 

SMBus operation will sustain the bit assertion across surprised warm-reset. 

BIOS reset handler can read this bit before issuing any SMBus transaction 

to determine whether a slave device may need special care to force the 

slave to idle state (e.g. via clock override toggling SMB_CKOVRD and/or via 

induced timeout by asserting SMB_CKOVRD for 25-35 ms).