Intel E7-8891 v2 CM8063601377422 Manual De Usuario

220

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

Datasheet Volume Two: Functional Description, February 2014

2:2

RW

0x0

fatal_error_reporting_enable:

Controls the reporting of fatal errors that IIO detects on the PCI 

Express/DMI interface.
0: Reporting of Fatal error detected by device is disabled
1: Reporting of Fatal error detected by device is enabled
Refer to PCI Express Base Specification, Revision 2.0 for complete 

details of how this bit is used in conjunction with other bits to report 

errors.
This bit is not used to control the reporting of other internal 

component uncorrectable fatal errors (at the port unit) in any way.

1:1

RW

0x0

non_fatal_error_reporting_enable:

Controls the reporting of nonfatal errors that IIO detects on the PCI 

Express/DMI interface.
0: Reporting of Non Fatal error detected by device is disabled
1: Reporting of Non Fatal error detected by device is enabled
Refer to PCI Express Base Specification, Revision 2.0 for complete 

details of how this bit is used in conjunction with other bits to report 

errors.
This bit is not used to control the reporting of other internal 

component uncorrectable nonfatal errors (at the port unit) in any way.

0:0

RW

0x0

correctable_error_reporting_enable:

Controls the reporting of correctable errors that IIO detects on the 

PCI Express/DMI interface
0: Reporting of link Correctable error detected by the port is disabled
1: Reporting of link Correctable error detected by port is enabled
Refer to PCI Express Base Specification, Revision 2.0 for complete 

details of how this bit is used in conjunction with other bits to report 

errors.
This bit is not used to control the reporting of other internal 

component correctable errors (at the port unit) in any way.