Corsair 4 GB Registered DDR DIMM ECC PC2700 (333 MHz) CM74SD4096RLP-2700/S Manual De Usuario
Los códigos de productos
CM74SD4096RLP-2700/S
Pin Name
A0 - A13
BA0, BA1
DQ0 - DQ63
CB0 - CB7
DQS0 - DQS17
CK0, /CK0
CKE0, CKE1
/CS0, /CS1
/RAS
/CAS
/WE
VDD
VDDQ
VSS
VREF
VDDSPD
SDA
SCL
SA0 - SA2
/RESET
NC
BA0, BA1
DQ0 - DQ63
CB0 - CB7
DQS0 - DQS17
CK0, /CK0
CKE0, CKE1
/CS0, /CS1
/RAS
/CAS
/WE
VDD
VDDQ
VSS
VREF
VDDSPD
SDA
SCL
SA0 - SA2
/RESET
NC
Function
Address Inputs
Bank Address Select Inputs
Data Input/Output
ECC Check Bits
Data Strobe Input/Output
Clock Inputs
Clock Enable Inputs
Chip Select Inputs
Row Address Strobe Input
Column Address Strobe Input
Write Enable Input
Power Supply (2.5V)
Data Input/Output Power Supply
Ground
SSTL-2 Signalling Reference Voltage
Serial EEPROM Power
SPD Data Output
SPD Clock Input
SPD Address Inputs
Reset Enable
No Connection
Bank Address Select Inputs
Data Input/Output
ECC Check Bits
Data Strobe Input/Output
Clock Inputs
Clock Enable Inputs
Chip Select Inputs
Row Address Strobe Input
Column Address Strobe Input
Write Enable Input
Power Supply (2.5V)
Data Input/Output Power Supply
Ground
SSTL-2 Signalling Reference Voltage
Serial EEPROM Power
SPD Data Output
SPD Clock Input
SPD Address Inputs
Reset Enable
No Connection
Page 2
4 GB Registered DDR DIMM with ECC
General Description
The CM74SD4096RLP is a Double Data Rate SDRAM Dual Inline
Memory Module (DIMM), designed for applications requiring the ultimate
in memory density. This DIMM includes Error Checking and Correcting
(ECC) for maximum reliability, and has registered address and control
signals to enable fully confi gured systems.
Memory Module (DIMM), designed for applications requiring the ultimate
in memory density. This DIMM includes Error Checking and Correcting
(ECC) for maximum reliability, and has registered address and control
signals to enable fully confi gured systems.
These modules are constructed using thirty-six 256Mx4 (1024 MBit) DDR
SDRAMs in TSOP-II packages, and are fully compliant with appropriate
JEDEC specifi cations. The module also includes an EEPROM to support
Serial Presence Detect (SPD) requirements. Decoupling capacitors are
mounted on the printed circuit board for each DDR SDRAM device, and
series termination is provided on all clock and data lines.
SDRAMs in TSOP-II packages, and are fully compliant with appropriate
JEDEC specifi cations. The module also includes an EEPROM to support
Serial Presence Detect (SPD) requirements. Decoupling capacitors are
mounted on the printed circuit board for each DDR SDRAM device, and
series termination is provided on all clock and data lines.
The synchronous design of these Corsair SDRAM DIMMs allows precise
cycle control with the use of the system clock. Two I/O transactions are
possible on every clock cycle due to the use of double data rate RAMs. The
high clock frequency and high density of this device enable a high level of
performance to be achieved in advanced workstations and servers.
cycle control with the use of the system clock. Two I/O transactions are
possible on every clock cycle due to the use of double data rate RAMs. The
high clock frequency and high density of this device enable a high level of
performance to be achieved in advanced workstations and servers.
Pin Defi nitions