Texas Instruments THS7373EVM Evaluation Module THS7373EVM THS7373EVM Hoja De Datos
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THS7373EVM
+V
S
External
Input/Output
Pin
Internal
Circuitry
Circuitry
SBOS506A – DECEMBER 2009 – REVISED AUGUST 2012
APPLICATION INFORMATION
coefficient capacitors. The design of the THS7373
The THS7373 is targeted for systems that require a
allows
operation
down
to
2.6
V,
but
it
is
single standard-definition (CVBS) video output for
recommended to use at least a 3-V supply to ensure
CVBS video support along with three high-definition
that no issues arise with headroom or clipping with
(HD) video outputs. Although it can be used for
100% color-saturated CVBS signals.
numerous
other
applications,
the
needs
and
requirements of the video signal are the most
A 0.1-
μ
F capacitor should be placed as close as
important design parameters of the THS7373. Built
possible to the power-supply pins to avoid potential
on
the
revolutionary,
complementary
Silicon
ringing or oscillations. Additionally, a large capacitor
Germanium (SiGe) BiCom3X process, the THS7373
(such as 22
μ
F to 100
μ
F) should be placed on the
incorporates many features not typically found in
power-supply line to minimize interference with 50-
integrated video parts while consuming very low
/60-Hz line frequencies.
power. The THS7373 includes the following features:
INPUT VOLTAGE
•
Single-supply 3-V to 5-V operation with low total
quiescent current of 16.2 mA at 3.3 V and 16.9
quiescent current of 16.2 mA at 3.3 V and 16.9
The THS7373 input range allows for an input signal
mA at 5 V
range from –0.4 V to approximately (V
S+
– 1.5 V).
•
Disable mode allows for shutting down the
However, because of the internal fixed gain of 2 V/V
THS7373
to
save
system
power
in
power-
(+6 dB) and the internal output level shift of 300 mV,
sensitive applications
the output is generally the limiting factor for the
allowable linear input range. For example, with a 5-V
allowable linear input range. For example, with a 5-V
•
Input configuration accepting dc + level shift, ac
supply, the linear input range is from –0.4 V to 3.5 V.
sync-tip clamp, or ac-bias:
However, because of the gain and level shift, the
–
Reduces quiescent current to as low as 0.1 µA
linear output range limits the allowable linear input
•
Flexible input configurations allows for dc + level
range to approximately –0.1 V to 2.3 V.
shift, ac sync-tip clamp, or ac-biasing:
–
–
AC-biasing is configured by use of an external
INPUT OVERVOLTAGE PROTECTION
pull-up resistor to the positive power supply
The THS7373 is built using a very high-speed,
•
Sixth-order, low-pass filter for DAC reconstruction
complementary, bipolar, and CMOS process. The
or ADC image rejection:
internal junction breakdown voltages are relatively
–
9.5 MHz for NTSC, PAL, or SECAM composite
low for these very small geometry devices. These
video baseband signal (CVBS)
breakdowns are reflected in the
–
36 MHz for 720p, 1080i, or up to 1080p30
table. All input and output device pins are
Y’/P’
B
/P’
R
or G’B’R’ signals
protected with internal ESD protection diodes to the
•
HD bypass mode bypasses the HD low-pass
power supplies, as shown in
filters for all three channels:
These diodes provide moderate protection to input
–
HD channels can support 1080p60 or QXGA
overdrive voltages above and below the supplies as
video
with
350-MHz
and
450-V/µs
well. The protection diodes can typically support
performance
30 mA of continuous current when overdriven.
•
Internal fixed gain of 2 V/V (+6 dB)
•
Supports driving two video lines per channel with
dc-coupling or traditional ac-coupling
dc-coupling or traditional ac-coupling
•
Flow-through configuration using a TSSOP-14
package that complies with the latest lead-free
(RoHS-compatible)
package that complies with the latest lead-free
(RoHS-compatible)
and
green
manufacturing
requirements
OPERATING VOLTAGE
The THS7373 is designed to operate from 3 V to 5 V
over the –40°C to +85°C temperature range. The
over the –40°C to +85°C temperature range. The
Figure 97. Internal ESD Protection
impact on performance over the entire temperature
range is negligible as a result of the implementation
of thin film resistors and high-quality, low-temperature
range is negligible as a result of the implementation
of thin film resistors and high-quality, low-temperature
30
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