Texas Instruments IC MCU 16B MSP430F2418TPM LQFP-64 TID MSP430F2418TPM Hoja De Datos
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MSP430F2418TPM
RO/P(DAC12_x)
Max
0.3
AVCC
AVCC−0.3V
VOUT
Min
RLoad
AVCC
CLoad= 100pF
2
ILoad
DAC12
O/P(DAC12_x)
MSP430F261x
MSP430F241x
MSP430F241x
SLAS541K – JUNE 2007 – REVISED NOVEMBER 2012
12-Bit DAC Output Specifications
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN
TYP
MAX
UNIT
No Load, V
eREF+
= AV
CC
,
DAC12_xDAT = 0h, DAC12IR = 1,
0
0.005
DAC12AMPx = 7
No Load, V
eREF+
= AV
CC
,
AV
CC
-
DAC12_xDAT = 0FFFh, DAC12IR = 1,
AV
CC
0.05
DAC12AMPx = 7
Output voltage range
(1)
(see
V
O
2.2 V, 3 V
V
)
R
Load
= 3 k
Ω
, V
eREF+
= AV
CC
,
DAC12_xDAT = 0h, DAC12IR = 1,
0
0.1
DAC12AMPx = 7
R
Load
= 3 k
Ω
, V
eREF+
= AV
CC
,
AV
CC
-
DAC12_xDAT = 0FFFh, DAC12IR = 1,
AV
CC
0.13
DAC12AMPx = 7
Maximum DAC12 load
C
L(DAC12)
2.2 V, 3 V
100
pF
capacitance
2.2 V
-0.5
0.5
I
L(DAC12)
Maximum DAC12 load current
mA
3 V
-1
1
R
Load
= 3 k
Ω
, V
O/P(DAC12)
= 0 V,
150
250
DAC12AMPx = 7, DAC12_xDAT = 0h
R
Load
= 3 k
Ω
, V
O/P(DAC12)
= AV
CC
,
Output resistance (see
DAC12AMPx = 7,
150
250
R
O/P(DAC12)
2.2 V, 3 V
Ω
)
DAC12_xDAT = 0FFFh
R
Load
= 3 k
Ω
,
0.3 V < V
O/P(DAC12)
< AV
CC
- 0.3 V,
1
4
DAC12AMPx = 7
(1)
Data is valid after the offset calibration of the output amplifier.
Figure 44. DAC12_x Output Resistance Tests
12-Bit DAC Reference Input Specifications
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN
TYP
MAX
UNIT
DAC12IR = 0
(1) (2)
AV
CC
/ 3
AV
CC
+ 0.2
Reference input
V
eREF+
2.2 V, 3 V
V
voltage range
DAC12IR = 1
(3) (4)
AV
CC
AV
CC
+ 0.2
DAC12_0 IR = DAC12_1 IR = 0
20
M
Ω
DAC12_0 IR = 1, DAC12_1 IR = 0
R
i(VREF+)
,
Reference input
40
48
56
2.2 V, 3 V
DAC12_0 IR = 0, DAC12_1 IR = 1
R
i(VeREF+)
resistance
k
Ω
DAC12_0 IR = DAC12_1 IR = 1,
20
24
28
DAC12_0 SREFx = DAC12_1 SREFx
(5)
(1)
For a full-scale output, the reference input voltage can be as high as 1/3 of the maximum output voltage swing (AV
CC
).
(2)
The maximum voltage applied at reference input voltage terminal V
eREF+
= [AV
CC
- VE(O)] / [3 × (1 + E
G
)].
(3)
For a full-scale output, the reference input voltage can be as high as the maximum output voltage swing (AV
CC
).
(4)
The maximum voltage applied at reference input voltage terminal V
eREF+
= [AV
CC
- V
E(O)
] / (1 + E
G
).
(5)
When DAC12IR = 1 and DAC12SREFx = 0 or 1 for both channels, the reference input resistive dividers for each DAC are in parallel
reducing the reference input resistance.
reducing the reference input resistance.
Copyright © 2007–2012, Texas Instruments Incorporated
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