Microchip Technology AC244055 Hoja De Datos
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2011-2013 Microchip Technology Inc.
DS40001574C-page 327
PIC16(L)F1938/9
27.2
Register Definitions: LCD Control
REGISTER 27-1:
LCDCON: LIQUID CRYSTAL DISPLAY (LCD) CONTROL REGISTER
R/W-0/0
R/W-0/0
R/C-0/0
U-0
R/W-0/0
R/W-0/0
R/W-1/1
R/W-1/1
LCDEN
SLPEN
WERR
—
CS<1:0>
LMUX<1:0>
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
C = Only clearable bit
bit 7
LCDEN:
LCD Driver Enable bit
1 = LCD Driver module is enabled
0 = LCD Driver module is disabled
0 = LCD Driver module is disabled
bit 6
SLPEN:
LCD Driver Enable in Sleep Mode bit
1 = LCD Driver module is disabled in Sleep mode
0 = LCD Driver module is enabled in Sleep mode
0 = LCD Driver module is enabled in Sleep mode
bit 5
WERR:
LCD Write Failed Error bit
1 = LCDDATAn register written while the WA bit of the LCDPS register = 0 (must be cleared in
software)
0 = No LCD write error
bit 4
Unimplemented:
Read as ‘0’
bit 3-2
CS<1:0>:
Clock Source Select bits
00 = F
OSC
/256
01 = T1OSC (Timer1)
1x = LFINTOSC (31 kHz)
1x = LFINTOSC (31 kHz)
bit 1-0
LMUX<1:0>:
Commons Select bits
Note 1:
On these devices, COM3 and SEG15 are shared on one pin, limiting the device from driving 64 pixels.
LMUX<1:0>
Multiplex
Maximum Number of Pixels
Bias
PIC16(L)F1938
PIC16(L)F1939
00
Static (COM0)
16
24
Static
01
1/2 (COM<1:0>)
32
48
1/2 or 1/3
10
1/3 (COM<2:0>)
48
72
1/2 or 1/3
11
1/4 (COM<3:0>)
60
(1)
96
1/3