Microchip Technology MA330031-2 Hoja De Datos

DS70000657H-page 16

 2011-2013 Microchip Technology Inc.

= Pins are up to 5V tolerant 

The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See 

 for available peripherals and for information on limitations.

Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See 

 for more information.

The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected 
to V

SS

 externally.

There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the 
JTAGEN bit field in 

48 47 46 45

43 42 41 40 39 38

13 14 15 16 17 18 19

21 22 23

3

33

31

30

29

28

27

26

25

4

5

7

9

10

11

12

1

2

35

34

6

24

36

37

PGEC1/AN4/C1IN1+/RPI34/RB2

PGED1/AN5/C1IN1-/RP35/RB3

AN6/OA3OUT/C4IN1+/OCFB/RC0

AN7/C3IN1-/C4IN1-/RC1

AN8/C3IN1+/U1RTS/BCLK1/RC2

V

DD

V

SS

OSC1/CLKI/RA2

OSC2/CLKO/RA3

SDA2/RPI24/RA8

SCL2/RP36/RB4

TC

K

/C

V

RE

F

1

O

/ASCL

1

/R

P4

0

/T

4

CK/

R

B8

RP

39/

INT

0

/RB

7

PG

EC2

/ASCL

2/

R

P3

8

/RB6

PG

ED2

/ASDA2

/R

P

3

7/

RB5

V

DD

V

SS

S

C

L1/

R

P

I53/

R

C

5

SDA1

/R

PI

5

2/

RC4

SCK1

/R

PI

5

1/

RC3

S

D

I1/RP

I25/R

A

9

CV

RE

F

2O

/S

DO

1/

RP2

0/T

1C

K/RA4

RPI45/CTPLS/RB13

RPI44/RB12

RP43/RB11

RP42/RB10

V

CAP

V

SS

RP57/RC9

RP56/RC8

RP55/RC7

RP54/RC6

TMS/ASDA1/RP41/RB9

T

D

O/R

A

1

0

TD

I/

R

A

7

RPI4

6/

T

3CK/R

B

1

4

RPI4

7/

T

5CK/R

B

1

5

AV

SS

AV

DD

MC

LR

AN0

/O

A

2

O

UT/

R

A0

A

N

1/

C2IN1

+

/RA

1

PG

ED3

/V

RE

F

-/

AN2

/C2

IN

1-

/SS1

/RP

I32

/CT

E

D2

/RB

0

PG

EC3

/V

RE

F

+/

A

N

3

/OA

1

O

UT

/RP

I33

/CT

E

D1

/RB

1

8

N/C

20

N/C

32

N/C

44

N/C