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Microchip Technology MA330031-2 Hoja De Datos

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dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 38
 2011-2013 Microchip Technology Inc.
FIGURE 3-2:
PROGRAMMER’S MODEL
N
OV
Z
C
TBLPAG
PC23
PC0
7
0
D0
D15
Program Counter
Data Table Page Address
STATUS Register
Working/Address
Registers
DSP Operand
Registers
W0 (WREG)
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
 Frame Pointer/W14
Stack Pointer/W15
DSP Address
Registers
AD39
AD0
AD31
DSP
Accumulators
(1)
ACCA
ACCB
DSRPAG
9
0
RA
0
OA
(1)
OB
(1)
SA
(1)
SB
(1)
RCOUNT
15
0
Repeat Loop Counter
DCOUNT
15
0
DO
 Loop Counter and Stack
(1)
DOSTART
23
0
DO
 Loop Start Address and Stack
(1)
0
DOEND
DO
 Loop End Address and Stack
(1)
IPL2 IPL1
SPLIM
Stack Pointer Limit
AD15
23
0
SRL
IPL0
PUSH.s
 and POP.s Shadows
Nested 
DO
 Stack
0
0
OAB
(1)
SAB
(1)
X Data Space Read Page Address
DA
(1)
DC
0
0
0
0
DSWPAG
X Data Space Write Page Address
8
0
Note 1:
This feature or bit is available on dsPIC33EPXXXMC20X/50X and dsPIC33EPXXXGP50X devices only.
CORCON
15
0
CPU Core Control Register