Microchip Technology MA330031-2 Hoja De Datos
2011-2013 Microchip Technology Inc.
DS70000657H-page 395
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
53
NEG
NEG
Acc
(
Negate Accumulator
1
1
OA,OB,OAB,
SA,SB,SAB
NEG
f
f = f + 1
1
1
C,DC,N,OV,Z
NEG
f,WREG
WREG = f + 1
1
1
C,DC,N,OV,Z
NEG
Ws,Wd
Wd = Ws + 1
1
1
C,DC,N,OV,Z
54
NOP
NOP
No Operation
1
1
None
NOPR
No Operation
1
1
None
55
POP
POP
f
Pop f from Top-of-Stack (TOS)
1
1
None
POP
Wdo
Pop from Top-of-Stack (TOS) to Wdo
1
1
None
POP.D
Wnd
Pop from Top-of-Stack (TOS) to
W(nd):W(nd + 1)
W(nd):W(nd + 1)
1
2
None
POP.S
Pop Shadow Registers
1
1
All
56
PUSH
PUSH
f
Push f to Top-of-Stack (TOS)
1
1
None
PUSH
Wso
Push Wso to Top-of-Stack (TOS)
1
1
None
PUSH.D
Wns
Push W(ns):W(ns + 1) to Top-of-Stack
(TOS)
(TOS)
1
2
None
PUSH.S
Push Shadow Registers
1
1
None
57
PWRSAV
PWRSAV #lit1
Go into Sleep or Idle mode
1
1
WDTO,Sleep
58
RCALL
RCALL
Expr
Relative Call
1
4
SFA
RCALL
Wn
Computed Call
1
4
SFA
59
REPEAT
REPEAT
#lit15
Repeat Next Instruction lit15 + 1 times
1
1
None
REPEAT
Wn
Repeat Next Instruction (Wn) + 1 times
1
1
None
60
RESET
RESET
Software device Reset
1
1
None
61
RETFIE
RETFIE
Return from interrupt
1
6 (5)
SFA
62
RETLW
RETLW
#lit10,Wn
Return with literal in Wn
1
6 (5)
SFA
63
RETURN
RETURN
Return from Subroutine
1
6 (5)
SFA
64
RLC
RLC
f
f = Rotate Left through Carry f
1
1
C,N,Z
RLC
f,WREG
WREG = Rotate Left through Carry f
1
1
C,N,Z
RLC
Ws,Wd
Wd = Rotate Left through Carry Ws
1
1
C,N,Z
65
RLNC
RLNC
f
f = Rotate Left (No Carry) f
1
1
N,Z
RLNC
f,WREG
WREG = Rotate Left (No Carry) f
1
1
N,Z
RLNC
Ws,Wd
Wd = Rotate Left (No Carry) Ws
1
1
N,Z
66
RRC
RRC
f
f = Rotate Right through Carry f
1
1
C,N,Z
RRC
f,WREG
WREG = Rotate Right through Carry f
1
1
C,N,Z
RRC
Ws,Wd
Wd = Rotate Right through Carry Ws
1
1
C,N,Z
67
RRNC
RRNC
f
f = Rotate Right (No Carry) f
1
1
N,Z
RRNC
f,WREG
WREG = Rotate Right (No Carry) f
1
1
N,Z
RRNC
Ws,Wd
Wd = Rotate Right (No Carry) Ws
1
1
N,Z
68
SAC
SAC
Acc,#Slit4,Wdo
)
Store Accumulator
1
1
None
SAC.R
Acc,#Slit4,Wdo
)
Store Rounded Accumulator
1
1
None
69
SE
SE
Ws,Wnd
Wnd = sign-extended Ws
1
1
C,N,Z
70
SETM
SETM
f
f = 0xFFFF
1
1
None
SETM
WREG
WREG = 0xFFFF
1
1
None
SETM
Ws
Ws = 0xFFFF
1
1
None
71
SFTAC
SFTAC
Acc,Wn
(
)
Arithmetic Shift Accumulator by (Wn)
1
1
OA,OB,OAB,
SA,SB,SAB
SFTAC
Acc,#Slit6
Arithmetic Shift Accumulator by Slit6
1
1
OA,OB,OAB,
SA,SB,SAB
TABLE 28-2:
INSTRUCTION SET OVERVIEW (CONTINUED)
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
# of
Words
# of
Cycles
(
2
)
Status Flags
Affected
Note 1:
These instructions are available in dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices only.
2:
Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle.