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 2011-2014 Microchip Technology Inc.
DS70000652F-page 127
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
8.1.3
PLL CONFIGURATION
The primary oscillator and internal FRC oscillator can
optionally use an on-chip, 4x PLL to obtain higher
speeds of operation. 
For example, suppose an 8 MHz crystal is being used
with the selected oscillator mode of MS with PLL. This
provides a F
OSC
 of 8 MHz * 4 = 32 MHz. The resultant
device operating speed is 32/2 = 16 MIPS.
EQUATION 8-2:
MS WITH PLL MODE 
EXAMPLE
TABLE 8-1:
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
F
CY
 =
=
1
2
F
OSC
2
(8000000 • 4) = 16 MIPS
Oscillator Mode
Oscillator 
Source
POSCMD<1:0>
FNOSC<2:0>
See 
Note
Fast RC Oscillator with Divide-by-n (FRCDIVN)
Internal
xx
111
Fast RC Oscillator with Divide-by-16 (FRCDIV16)
Internal
xx
110
Low-Power RC Oscillator (LPRC)
Internal
xx
101
Secondary (Timer1) Oscillator (SOSC)
Secondary
xx
100
Primary Oscillator (MS) with PLL (MSPLL)
Primary
01
011
Primary Oscillator (EC) with PLL (ECPLL)
Primary
00
011
Primary Oscillator (HS)
Primary
10
010
Primary Oscillator (MS)
Primary
01
010
Primary Oscillator (EC)
Primary
00
010
Fast RC Oscillator (FRC) with Divide-by-n and 
PLL (FRCPLL)
Internal
xx
001
Fast RC Oscillator (FRC)
Internal
xx
000
Note 1:
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
2:
This is the default oscillator mode for an unprogrammed (erased) device.