Microchip Technology AC244045 Hoja De Datos
© 2009 Microchip Technology Inc.
DS41341E-page 183
PIC16F72X/PIC16LF72X
FIGURE 17-13:
I
2
C SLAVE MODE TIMING (TRANSMISSION 10-BIT ADDRESS)
SDA
SCL
SSP
IF
BF
S
1
2
3
4
56
7
8
9
1
23
4
5
6
7
89
1
2
3
4
5
7
8
9
P
11
1
1
0
A9
A8
A
7
A6
A5
A4
A3
A
2
A
1
A0
11
1
1
0
A8
R/W
=
1
AC
K
AC
K
R/W
=
0
ACK
R
e
cei
v
e F
irst B
y
te of
A
d
dress
Cle
a
re
d
in
so
ft
wa
re
B
u
s M
a
ster
sends S
top
condi
ti
o
n
A9
6
R
e
ce
iv
e S
e
cond
B
y
te
of A
ddr
ess
C
lear
ed b
y
hard
w
are w
h
en
S
S
P
A
D
D
i
s
updat
ed
w
it
h
lo
w
byt
e
of a
ddre
ss.
UA
Clo
ck is h
e
ld
lo
w u
n
til
u
p
date
of S
S
P
A
D
D
h
a
s
ta
ke
n pl
ace
UA
is
set indicat
in
g
tha
t
the S
S
P
A
D
D
need
s to be
upda
ted
U
A
i
s
set
i
ndi
cati
ng
that
S
S
P
A
D
D
need
s to be
updat
ed
C
le
a
red
by har
dw
are
w
h
en
SSP
ADD is u
p
d
a
te
d
with
h
ig
h
b
y
te of a
ddre
ss.
SS
PBUF
is wr
it
te
n
with
con
tent
s of S
S
P
S
R
D
u
m
m
y re
ad of
S
S
P
B
U
F
to cle
a
r B
F
flag
R
e
cei
v
e F
irst B
y
te
of
A
ddr
ess
12
3
4
5
7
8
9
D7
D
6
D5
D4
D3
D1
AC
K
D2
6
T
ran
smitting
Dat
a
B
y
te
D0
Du
m
m
y r
e
a
d
o
f S
SPB
UF
to cl
e
a
r
B
F
flag
Sr
Cle
a
re
d
i
n
so
ft
wa
re
W
rit
e
o
f SSP
BUF
Cl
e
a
re
d
in
so
ft
wa
re
Co
m
p
le
tio
n
o
f
clea
rs B
F
flag
CK
P
C
KP is se
t in
so
ft
wa
re
, in
itia
te
s tr
a
n
s
m
issi
o
n
CK
P is a
u
to
m
a
ti
ca
lly
cle
a
re
d
in
h
a
rd
wa
re
h
o
ld
in
g
SC
L
lo
w
Clo
ck is h
e
ld
lo
w u
n
ti
l
u
pdate
of S
S
P
A
D
D
h
a
s
ta
k
e
n
pl
ac
e
da
ta
tran
smission
Clo
ck i
s
h
e
ld
lo
w
u
n
til
CK
P
is set to
‘
1
’
B
u
s M
a
ster
se
nds Rest
ar
ts
co
n
d
itio
n
D
u
m
m
y r
ead o
f S
S
P
B
U
F
to
clear
B
F
flag