Microchip Technology DM164134 Hoja De Datos
© 2006 Microchip Technology Inc.
DS41159E-page 35
PIC18FXX8
TXB0SIDH
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TXB0CON
PIC18F2X8 PIC18F4X8
-000 0-00
-000 0-00
-uuu u-uu
TXB1D7
PIC18F2X8 PIC18F4X8
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TXB1D6
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TXB1D5
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TXB1D4
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TXB1D3
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TXB1D2
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TXB1D1
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TXB1D0
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TXB1DLC
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TXB1EIDL
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TXB1EIDH
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TXB1CON
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TXB2D7
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TXB2D6
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TXB2D5
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TXB2D4
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TXB2D3
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TXB2D2
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TXB2D1
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TXB2D0
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TXB2DLC
PIC18F2X8 PIC18F4X8
-x-- xxxx
-u-- uuuu
-u-- uuuu
TXB2EIDL
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TXB2EIDH
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TXB2SIDL
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xxx- x-xx
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uuu- u-uu
TXB2SIDH
PIC18F2X8 PIC18F4X8
xxxx xxxx
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TXB2CON
PIC18F2X8 PIC18F4X8
-000 0-00
-000 0-00
-uuu u-uu
RXM1EIDL
PIC18F2X8 PIC18F4X8
xxxx xxxx
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RXM1EIDH
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TABLE 3-3:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Reset
WDT Reset
RESET
Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
interrupt vector (0008h or 0018h).
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4:
See Table 3-2 for Reset value for specific condition.
5:
Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
oscillator modes, they are disabled and read ‘0’.
6:
Values for CANSTAT also apply to its other instances (CANSTATRO1 through CANSTATRO4).