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© 2006 Microchip Technology Inc.
DS41159E-page 39
PIC18FXX8
REGISTER 4-1:
STKPTR: STACK POINTER REGISTER          
FIGURE 4-3:
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS           
R/C-0
R/C-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
STKFUL
STKUNF
SP4
SP3
SP2
SP1
SP0
bit 7
bit 0
bit 7
STKFUL: Stack Full Flag bit
1
 =  Stack became full or overflowed
0
 =  Stack has not become full or overflowed
bit 6
STKUNF: Stack Underflow Flag bit
1
 =  Stack underflow occurred
0
 =  Stack underflow did not occur
bit 5
Unimplemented: Read as ‘0’
bit  4-0
SP4:SP0: Stack Pointer Location bits
Note:
Bit 7 and bit 6 need to be cleared following a stack underflow or a stack overflow.
Legend:
R  
 
= Readable bit
W = Writable bit
U  = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
C = Clearable bit
00011
001A34h
11111
11110
11101
00010
00001
00000
(1)
00010
Return Address Stack
Top-of-Stack
000D58h
TOSL
TOSH
TOSU
34h
1Ah
00h
STKPTR<4:0>
000000h
Note 1: No RAM associated with this address; always maintained ‘0’s.