Microchip Technology DM183037 Hoja De Datos
PIC18F97J94 FAMILY
DS30575A-page 224
2012 Microchip Technology Inc.
11.14 Virtual PORT
This device includes a single virtual port, which is used
to construct a logically addressed 8-bit PORT from
8 physically unrelated pins on the device. The virtual
PORT is controlled through the PORTVR, LATVR and
TRISVR registers. These function identically to the
PORT, LAT and TRIS registers of the actual I/O ports.
Refer to
to construct a logically addressed 8-bit PORT from
8 physically unrelated pins on the device. The virtual
PORT is controlled through the PORTVR, LATVR and
TRISVR registers. These function identically to the
PORT, LAT and TRIS registers of the actual I/O ports.
Refer to
for
more information.
11.15 PPS-Lite
Previous PIC18 devices had I/O pins that were
“hard-wired” to a set of peripherals. For example, a port
pin might have had the option of serving as an I/O pin,
an analog input or as an interrupt source. In an effort to
increase the flexibility of the parts, PIC18F97J94
devices contain PPS-Lite (Peripheral Pin Select-Lite),
which allows the developer to connect an internal
peripheral to a subset of pins. PPS-Lite is similar to
PPS (available on PIC18F products), but limits the user
to interconnections within four sets of pin/peripheral
groups.
The PPS-Lite feature allows some flexibility in choosing
which peripheral connects to any particular pin. This
allows designs to be maximized for layout efficiency,
and also may allow component changes without
changing the printed circuit board design. The Periph-
eral Pin Select feature operates over a fixed subset of
digital I/O pins (those designated as RPn pins). Users
may independently map the input and/or output of most
digital peripherals to a limited set of these I/O pins. The
PPS-Lite configuration is performed in software and
does not require the device to be reprogrammed. Hard-
ware safeguards are included that prevent accidental
or spurious changes to the peripheral mapping once it
has been established.
“hard-wired” to a set of peripherals. For example, a port
pin might have had the option of serving as an I/O pin,
an analog input or as an interrupt source. In an effort to
increase the flexibility of the parts, PIC18F97J94
devices contain PPS-Lite (Peripheral Pin Select-Lite),
which allows the developer to connect an internal
peripheral to a subset of pins. PPS-Lite is similar to
PPS (available on PIC18F products), but limits the user
to interconnections within four sets of pin/peripheral
groups.
The PPS-Lite feature allows some flexibility in choosing
which peripheral connects to any particular pin. This
allows designs to be maximized for layout efficiency,
and also may allow component changes without
changing the printed circuit board design. The Periph-
eral Pin Select feature operates over a fixed subset of
digital I/O pins (those designated as RPn pins). Users
may independently map the input and/or output of most
digital peripherals to a limited set of these I/O pins. The
PPS-Lite configuration is performed in software and
does not require the device to be reprogrammed. Hard-
ware safeguards are included that prevent accidental
or spurious changes to the peripheral mapping once it
has been established.
11.15.1
AVAILABLE PINS
The PPS-Lite feature is used with a range of pins. All
devices in the PIC18F97J94 family contain a total of
47 remappable peripheral pins, labeled RP0 through
RP46. Pins that support PPS-Lite feature include the
designation, “RPn” in their full pin designation, where
“RP” designates a remappable peripheral and “n” is the
remappable pin number. For PIC18F97J94 devices,
RP41 through RP45 are digital inputs only.
devices in the PIC18F97J94 family contain a total of
47 remappable peripheral pins, labeled RP0 through
RP46. Pins that support PPS-Lite feature include the
designation, “RPn” in their full pin designation, where
“RP” designates a remappable peripheral and “n” is the
remappable pin number. For PIC18F97J94 devices,
RP41 through RP45 are digital inputs only.
11.15.2
AVAILABLE PERIPHERALS
The peripherals managed by the Peripheral Pin Select
are all “digital only” peripherals. These include general
serial communications (USART and SPI), general pur-
pose timer clock inputs, timer related peripherals (input
capture and output compare) and external interrupt
inputs.
In comparison, some digital only peripheral modules
are not currently included in the Peripheral Pin Select
feature. This is because the peripheral’s function
requires special I/O circuitry on a specific port and can-
not be easily connected to multiple pins. These
modules include I
are all “digital only” peripherals. These include general
serial communications (USART and SPI), general pur-
pose timer clock inputs, timer related peripherals (input
capture and output compare) and external interrupt
inputs.
In comparison, some digital only peripheral modules
are not currently included in the Peripheral Pin Select
feature. This is because the peripheral’s function
requires special I/O circuitry on a specific port and can-
not be easily connected to multiple pins. These
modules include I
2
C, USB, change notification inputs,
RTCC alarm output and all modules with analog inputs,
such as the A/D Converter.
A key difference between remappable and
non-remappable peripherals is that remappable
peripherals are not associated with a default I/O pin. The
peripheral must always be assigned to a specific I/O pin
before it can be used. In contrast, non-remappable
peripherals are always available on a default pin, assum-
ing that the peripheral is active and not conflicting with
another peripheral.
When a remappable peripheral is active on a given I/O
pin, it takes priority over all other digital I/O and digital
communication peripherals associated with the pin.
Priority is given, regardless of the type of peripheral
that is mapped. Remappable peripherals never take
priority over any analog functions associated with the
pin.
such as the A/D Converter.
A key difference between remappable and
non-remappable peripherals is that remappable
peripherals are not associated with a default I/O pin. The
peripheral must always be assigned to a specific I/O pin
before it can be used. In contrast, non-remappable
peripherals are always available on a default pin, assum-
ing that the peripheral is active and not conflicting with
another peripheral.
When a remappable peripheral is active on a given I/O
pin, it takes priority over all other digital I/O and digital
communication peripherals associated with the pin.
Priority is given, regardless of the type of peripheral
that is mapped. Remappable peripherals never take
priority over any analog functions associated with the
pin.