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 2010-2012 Microchip Technology Inc.
DS41412F-page 383
PIC18(L)F2X/4XK22
         
         
BNC
Branch if Not Carry 
Syntax:
BNC    n
Operands:
-128 
 n  127
Operation:
if CARRY bit is ‘0’
(PC) + 2 + 2n 
 PC
Status Affected:
None
Encoding:
1110
0011
nnnn
nnnn
Description:
If the CARRY bit is ‘0’, then the program 
will branch.
The 2’s complement number ‘2n’ is 
added to the PC. Since the PC will have 
incremented to fetch the next 
instruction, the new address will be 
PC + 2 + 2n. This instruction is then a 
two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Q3
Q4
Decode
Read literal 
‘n’
Process 
Data
Write to PC
No 
operation
No 
operation
No 
operation
No 
operation
If No Jump:
Q1
Q2
Q3
Q4
Decode
Read literal 
‘n’
Process 
Data
No 
operation
Example:
HERE
BNC
Jump
Before Instruction
PC
=
address (HERE)
After Instruction
If CARRY
0;
PC
= address 
(Jump)
If CARRY
1;
PC
= address (HERE + 2)
BNN
Branch if Not Negative 
Syntax:
BNN    n
Operands:
-128 
 n  127
Operation:
if NEGATIVE bit is ‘0’
(PC) + 2 + 2n 
 PC
Status Affected:
None
Encoding:
1110
0111
nnnn
nnnn
Description:
If the NEGATIVE bit is ‘0’, then the 
program will branch.
The 2’s complement number ‘2n’ is 
added to the PC. Since the PC will have 
incremented to fetch the next 
instruction, the new address will be 
PC + 2 + 2n. This instruction is then a 
two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Q3
Q4
Decode
Read literal 
‘n’
Process 
Data
Write to PC
No 
operation
No 
operation
No 
operation
No 
operation
If No Jump:
Q1
Q2
Q3
Q4
Decode
Read literal 
‘n’
Process 
Data
No 
operation
Example:
HERE
BNN
Jump
Before Instruction
PC
=
address (HERE)
After Instruction
If NEGATIVE
0;
PC
= address (Jump)
If NEGATIVE
1;
PC
= address (HERE + 2)