Intel BONANZA S478 I875 ATX DDR BLKD875PBZLK Manual De Usuario
Los códigos de productos
BLKD875PBZLK
Intel Desktop Board D875PBZ Technical Product Specification
56
Table 17. PCI Interrupt Routing Map
ICH5-R PIRQ Signal Name
PCI Interrupt Source
PIRQA
PIRQB
PIRQC
PIRQD
PIRQE
PIRQF
PIRQG PIRQH
AGP
connector
INTA
INTB
ICH5-R USB UHCI controller 1
INTA
SMBus
controller
INTB
ICH5-R USB UHCI controller 2
INTB
AC ’97 ICH5-R Audio
INTB
ICH5-R
LAN
INTA
ICH5-R USB UHCI controller 3
INTC
ICH5-R USB UHCI controller 4
INTA
ICH5-R USB 2.0 EHCI
controller
controller
INTD
PCI bus connector 1
INTD
INTA
INTB
INTC
PCI bus connector 2
INTC
INTB
INTA
INTD
PCI bus connector 3
INTD
INTA
INTB
INTC
PCI bus connector 4
INTB
INTA
INTC
INTD
PCI bus connector 5
INTC
INTA
INTD
INTB
Serial
ATA/Serial
ATA
RAID
INTA
✏
NOTE
In PIC mode, the ICH5-R can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5,
6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 16 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 16 for the
allocation of PIRQ lines to IRQ signals in APIC mode.