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DEMO9S08DZ60
Chapter 6 Parallel Input/Output Control
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
109
6.5.6.3
Port F Pull Enable Register (PTFPE)
NOTE
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
corresponding edge select and pin select functions are configured.
6.5.6.4
Port F Slew Rate Enable Register (PTFSE)
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
rate control to the desired value to ensure correct operation.
7
6
5
4
3
2
1
0
R
PTFPE7
PTFPE6
PTFPE5
PTFPE4
PTFPE3
PTFPE2
PTFPE1
PTFPE0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-39. Internal Pull Enable for Port F Register (PTFPE)
Table 6-37. PTFPE Register Field Descriptions
Field
Description
7:0
PTFPE[7:0]
Internal Pull Enable for Port F Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port F bit n.
1 Internal pull-up device enabled for port F bit n.
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port F bit n.
1 Internal pull-up device enabled for port F bit n.
7
6
5
4
3
2
1
0
R
PTFSE7
PTFSE6
PTFSE5
PTFSE4
PTFSE3
PTFSE2
PTFSE1
PTFSE0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-40. Slew Rate Enable for Port F Register (PTFSE)
Table 6-38. PTFSE Register Field Descriptions
Field
Description
7:0
PTFSE[7:0]
Output Slew Rate Enable for Port F Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTF pin. For port F pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port F bit n.
1 Output slew rate control enabled for port F bit n.
is enabled for the associated PTF pin. For port F pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port F bit n.
1 Output slew rate control enabled for port F bit n.