Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 Hoja De Datos
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Los códigos de productos
DEMO9S08DZ60
Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
137
8.1.1
Features
Key features of the MCG module are:
•
Frequency-locked loop (FLL)
— 0.2% resolution using internal 32-kHz reference
— 2% deviation over voltage and temperature using internal 32-kHz reference
— Internal or external reference can be used to control the FLL
•
Phase-locked loop (PLL)
— Voltage-controlled oscillator (VCO)
— Modulo VCO frequency divider
— Phase/Frequency detector
— Integrated loop filter
— Lock detector with interrupt capability
•
Internal reference clock
— Nine trim bits for accuracy
— Can be selected as the clock source for the MCU
•
External reference clock
— Control for external oscillator
— Clock monitor with reset capability
— Can be selected as the clock source for the MCU
•
Reference divider is provided
•
Clock source selected can be divided down by 1, 2, 4, or 8
•
BDC clock (MCGLCLK) is provided as a constant divide by 2 of the DCO output whether in an
FLL or PLL mode.
FLL or PLL mode.