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DEMO9S08DZ60
Chapter 5 Resets, Interrupts, and General System Control
MC9S08DZ60 Series Data Sheet, Rev. 4
84
Freescale Semiconductor
5.8.8
System Power Management Status and Control 2 Register
(SPMSC2)
(SPMSC2)
This register is used to report the status of the low-voltage warning function, and to configure the stop
mode behavior of the MCU. This register should be written during the user’s reset initialization program
to set the desired controls even if the desired settings are the same as the reset settings.
mode behavior of the MCU. This register should be written during the user’s reset initialization program
to set the desired controls even if the desired settings are the same as the reset settings.
Figure 5-10. System Power Management Status and Control 2 Register (SPMSC2)
7
6
5
4
3
2
1
0
R
0
0
LVDV
1
1
This bit can be written only one time after power-on reset. Additional writes are ignored.
LVWV
PPDF
0
0
PPDC
2
2
This bit can be written only one time after reset. Additional writes are ignored.
W
PPDACK
Power-on Reset:
0
0
0
0
0
0
0
0
LVD Reset:
0
0
u
u
0
0
0
0
Any other Reset:
0
0
u
u
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Table 5-11. SPMSC2 Register Field Descriptions
Field
Description
5
LVDV
Low-Voltage Detect Voltage Select — This write-once bit selects the low-voltage detect (LVD) trip point setting.
It also selects the warning voltage range. See
It also selects the warning voltage range. See
.
4
LVWV
Low-Voltage Warning Voltage Select — This bit selects the low-voltage warning (LVW) trip point voltage. See
.
3
PPDF
Partial Power Down Flag — This read-only status bit indicates that the MCU has recovered from stop2 mode.
0 MCU has not recovered from stop2 mode.
1 MCU recovered from stop2 mode.
0 MCU has not recovered from stop2 mode.
1 MCU recovered from stop2 mode.
2
PPDACK
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
0
PPDC
Partial Power Down Control — This write-once bit controls whether stop2 or stop3 mode is selected.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
Table 5-12. LVD and LVW Trip Point Typical Values
1
1
See Electrical Characteristics appendix for minimum and maximum values.
LVDV:LVWV
LVW Trip Point
LVD Trip Point
0:0
V
LVW0
= 2.74 V
V
LVD0
= 2.56 V
0:1
V
LVW1
= 2.92 V
1:0
V
LVW2
= 4.3 V
V
LVD1
= 4.0 V
1:1
V
LVW3
= 4.6 V