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DEMO9S08DZ60
Chapter 6 Parallel Input/Output Control
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
97
6.5.2.7
Port B Interrupt Pin Select Register (PTBPS)
6.5.2.8
Port B Interrupt Edge Select Register (PTBES)
7
6
5
4
3
2
1
0
R
PTBPS7
PTBPS6
PTBPS5
PTBPS4
PTBPS3
PTBPS2
PTBPS1
PTBPS0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-17. Port B Interrupt Pin Select Register (PTBPS)
Table 6-15. PTBPS Register Field Descriptions
Field
Description
7:0
PTBPS[7:0]
Port B Interrupt Pin Selects — Each of the PTBPSn bits enable the corresponding port B interrupt pin.
0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
7
6
5
4
3
2
1
0
R
PTBES7
PTBES6
PTBES5
PTBES4
PTBES3
PTBES2
PTBES1
PTBES0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-18. Port B Edge Select Register (PTBES)
Table 6-16. PTBES Register Field Descriptions
Field
Description
7:0
PTBES[7:0]
Port B Edge Selects — Each of the PTBESn bits serves a dual purpose by selecting the polarity of the active
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.