Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario
Los códigos de productos
DEMO9S12XHY256
Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
100
Freescale Semiconductor
2.3.23
Port S Input Register (PTIS)
1
PTS
Port S general purpose input/output data—Data Register, SCI TXD, PWM channel7
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI takes precedence over the PWM7 and general purpose I/O function if enabled
• The PWM7 takes precedence over the general purpose I/O function if enabled
• The PWM7 takes precedence over the general purpose I/O function if enabled
0
PTS
Port S general purpose input/output data—Data Register, SCI RXD, PWM channel6
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI takes precedence over the PWM6 and general purpose I/O function if enabled
• The PWM6 takes precedence over the general purpose I/O function if enabled
• The PWM6 takes precedence over the general purpose I/O function if enabled
Address 0x0249
Access: User read
1
1
Read: Anytime.
Write:Never, writes to this register have no effect.
Write:Never, writes to this register have no effect.
7
6
5
4
3
2
1
0
R
PTIS7
PTIS6
PTIS5
PTIS4
PTIS3
PTIS2
PTIS1
PTIS0
W
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-21. Port S Input Register (PTIS)
Table 2-18. PTIS Register Field Descriptions
Field
Description
7-0
PTIS
Port S input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Table 2-17. PTS Register Field Descriptions (continued)
Field
Description