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Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario

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DEMO9S12XHY256
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Memory Mapping Control (S12XMMCV4)
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
165
3.3.2.4
MMC Control Register (MMCCTL1)
Read: Anytime. .
Write: Refer to each bit description.
3.3.2.5
Program Page Index Register (PPAGE)
Read: Anytime
Address: 0x0013 PRR
7
6
5
4
3
2
1
0
R
MGRAMON
0
DFIFRON
PGMIFRON
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-10. MMC Control Register (MMCCTL1)
Table 3-6. MMCCTL1 Field Descriptions
Field
Description
7
MGRAMON
Flash Memory Controller  SCRATCH RAM visible in the global memory map
Write: Anytime
This bit is used to made the Flash Memory Controller SCRATCH RAM visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
5
DFIFRON
Data Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to made the IFR sector of the Data Flash visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
4
PGMIFRON
Program Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to map the IFR sector of the Program Flash to address range 0x40_000-0x40_3FFF of the global
memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
Address: 0x0015
7
6
5
4
3
2
1
0
R
PIX7
PIX6
PIX5
PIX4
PIX3
PIX2
PIX1
PIX0
W
Reset
1
1
1
1
1
1
1
0
Figure 3-11. Program Page Index Register (PPAGE)