Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario
Los códigos de productos
DEMO9S12XHY256
Background Debug Module (S12XBDMV2)
MC9S12XHY-Family Reference Manual Rev. 1.04
Freescale Semiconductor
209
5.4.3
BDM Hardware Commands
Hardware commands are used to read and write target system memory locations and to enter active
background debug mode. Target system memory includes all memory that is accessible by the CPU on the
SOC which can be on-chip RAM, non-volatile memory (e.g. EEPROM, Flash EEPROM), I/O and control
registers, and all external memory.
background debug mode. Target system memory includes all memory that is accessible by the CPU on the
SOC which can be on-chip RAM, non-volatile memory (e.g. EEPROM, Flash EEPROM), I/O and control
registers, and all external memory.
Hardware commands are executed with minimal or no CPU intervention and do not require the system to
be in active BDM for execution, although, they can still be executed in this mode. When executing a
hardware command, the BDM sub-block waits for a free bus cycle so that the background access does not
disturb the running application program. If a free cycle is not found within 128 clock cycles, the CPU is
momentarily frozen so that the BDM can steal a cycle. When the BDM finds a free cycle, the operation
does not intrude on normal CPU operation provided that it can be completed in a single cycle. However,
if an operation requires multiple cycles the CPU is frozen until the operation is complete, even though the
BDM found a free cycle.
be in active BDM for execution, although, they can still be executed in this mode. When executing a
hardware command, the BDM sub-block waits for a free bus cycle so that the background access does not
disturb the running application program. If a free cycle is not found within 128 clock cycles, the CPU is
momentarily frozen so that the BDM can steal a cycle. When the BDM finds a free cycle, the operation
does not intrude on normal CPU operation provided that it can be completed in a single cycle. However,
if an operation requires multiple cycles the CPU is frozen until the operation is complete, even though the
BDM found a free cycle.
The BDM hardware commands are listed in
The READ_BD and WRITE_BD commands allow access to the BDM register locations. These locations
are not normally in the system memory map but share addresses with the application in memory. To
distinguish between physical memory locations that share the same address, BDM memory resources are
enabled just for the READ_BD and WRITE_BD access cycle. This allows the BDM to access BDM
locations unobtrusively, even if the addresses conflict with the application memory map.
are not normally in the system memory map but share addresses with the application in memory. To
distinguish between physical memory locations that share the same address, BDM memory resources are
enabled just for the READ_BD and WRITE_BD access cycle. This allows the BDM to access BDM
locations unobtrusively, even if the addresses conflict with the application memory map.
Table 5-6. Hardware Commands
Command
Opcode
(hex)
Data
Description
BACKGROUND
90
None
Enter background mode if firmware is enabled. If enabled, an ACK will be
issued when the part enters active background mode.
issued when the part enters active background mode.
ACK_ENABLE
D5
None
Enable Handshake. Issues an ACK pulse after the command is executed.
ACK_DISABLE
D6
None
Disable Handshake. This command does not issue an ACK pulse.
READ_BD_BYTE
E4
16-bit address
16-bit data out
Read from memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Odd address data on low byte; even address data on high byte.
READ_BD_WORD
EC
16-bit address
16-bit data out
Read from memory with standard BDM firmware lookup table in map.
Must be aligned access.
Must be aligned access.
READ_BYTE
E0
16-bit address
16-bit data out
Read from memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Odd address data on low byte; even address data on high byte.
READ_WORD
E8
16-bit address
16-bit data out
Read from memory with standard BDM firmware lookup table out of map.
Must be aligned access.
Must be aligned access.
WRITE_BD_BYTE
C4
16-bit address
16-bit data in
Write to memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Odd address data on low byte; even address data on high byte.
WRITE_BD_WORD
CC
16-bit address
16-bit data in
Write to memory with standard BDM firmware lookup table in map.
Must be aligned access.
Must be aligned access.
WRITE_BYTE
C0
16-bit address
16-bit data in
Write to memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Odd address data on low byte; even address data on high byte.