Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario
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DEMO9S12XHY256
S12X Debug (S12XDBGV3) Module
MC9S12XHY-Family Reference Manual Rev. 1.04
Freescale Semiconductor
229
6.3.2
Register Descriptions
This section consists of the S12XDBG control and trace buffer register descriptions in address order. Each
comparator has a bank of registers that are visible through an 8-byte window between 0x0028 and 0x002F
in the S12XDBG module register address map. When ARM is set in DBGC1, the only bits in the
S12XDBG module registers that can be written are ARM, TRIG, and COMRV[1:0].
comparator has a bank of registers that are visible through an 8-byte window between 0x0028 and 0x002F
in the S12XDBG module register address map. When ARM is set in DBGC1, the only bits in the
S12XDBG module registers that can be written are ARM, TRIG, and COMRV[1:0].
0x0024
DBGTBH
R
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
W
0x0025
DBGTBL
R
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
W
0x0026
DBGCNT
R
0
CNT
W
0x0027
DBGSCRX
R
0
0
0
0
SC3
SC2
SC1
SC0
W
0x0027
DBGMFR
R
0
0
0
0
MC3
MC2
MC1
MC0
W
0x0028
1
DBGXCTL
(COMPA/C)
R
0
NDB
TAG
BRK
RW
RWE
reserved
COMPE
W
0x0028
2
DBGXCTL
(COMPB/D)
R
SZE
SZ
TAG
BRK
RW
RWE
reserved
COMPE
W
0x0029
DBGXAH
R
0
Bit 22
21
20
19
18
17
Bit 16
W
0x002A
DBGXAM
R
Bit 15
14
13
12
11
10
9
Bit 8
W
0x002B
DBGXAL
R
Bit 7
6
5
4
3
2
1
Bit 0
W
0x002C
DBGXDH
R
Bit 15
14
13
12
11
10
9
Bit 8
W
0x002D
DBGXDL
R
Bit 7
6
5
4
3
2
1
Bit 0
W
0x002E
DBGXDHM
R
Bit 15
14
13
12
11
10
9
Bit 8
W
0x002F
DBGXDLM
R
Bit 7
6
5
4
3
2
1
Bit 0
W
1
This represents the contents if the Comparator A or C control register is blended into this address.
2
This represents the contents if the Comparator B or D control register is blended into this address
Address
Name
Bit 7
6
5
4
3
2
1
Bit 0
Figure 6-2. Quick Reference to S12XDBG Registers