Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario
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DEMO9S12XHY256
Inter-Integrated Circuit (IICV3) Block Description
MC9S12XHY-Family Reference Manual, Rev. 1.04
396
Freescale Semiconductor
12.2
External Signal Description
The IICV3 module has two external pins.
12.2.1
IIC_SCL — Serial Clock Line Pin
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
12.2.2
IIC_SDA — Serial Data Line Pin
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
12.3
Memory Map and Register Definition
This section provides a detailed description of all memory and registers for the IIC module.
12.3.1
Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0000
IBAD
R
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
0
W
0x0001
IBFD
R
IBC7
IBC6
IBC5
IBC4
IBC3
IBC2
IBC1
IBC0
W
0x0002
IBCR
R
IBEN
IBIE
MS/SL
Tx/Rx
TXAK
0
0
IBSWAI
W
RSTA
0x0003
IBSR
R
TCF
IAAS
IBB
IBAL
0
SRW
IBIF
RXAK
W
0x0004
IBDR
R
D7
D6
D5
D4
D3
D2
D1
D0
W
0x0005
IBCR2
R
GCEN
ADTYPE
0
0
0
ADR10
ADR9
ADR8
W
= Unimplemented or Reserved
Figure 12-2. IIC Register Summary