Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario

Freescale Semiconductor

553

The LCD RAM consists of 20 bytes. After reset the LCD RAM contents will be indeterminate (I), as
indicated by

.

39:0

FP[39:0]EN

Frontplane Output Enable — The FP[39:0]EN bit enables the frontplane driver outputs. If LCDEN = 0, these
bits have no effect on the state of the I/O pins. It is recommended to set FP[39:0]EN bits before LCDEN is set.
0 Frontplane driver output disabled on FP[39:0].
1 Frontplane driver output enabled on FP[39:0].

7

6

5

4

3

2

1

0

0x0008

R

FP1BP3

FP1BP2

FP1BP1

FP1BP0

FP0BP3

FP0BP2

FP0BP1

FP0BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x0009

R

FP3BP3

FP3BP2

FP3BP1

FP3BP0

FP2BP3

FP2BP2

FP2BP1

FP2BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000A

R

FP5BP3

FP5BP2

FP5BP1

FP5BP0

FP4BP3

FP4BP2

FP4BP1

FP4BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000B

R

FP7BP3

FP7BP2

FP7BP1

FP7BP0

FP6BP3

FP6BP2

FP6BP1

FP6BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000C

R

FP9BP3

FP9BP2

FP9BP1

FP9BP0

FP8BP3

FP8BP2

FP8BP1

FP8BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000D

R

FP11BP3

FP11BP2

FP11BP1

FP11BP0

FP10BP3

FP10BP2

FP10BP1

FP10BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000E

R

FP13BP3

FP13BP2

FP13BP1

FP13BP0

FP12BP3

FP12BP2

FP12BP1

FP12BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x000F

R

FP15BP3

FP15BP2

FP15BP1

FP15BP0

FP14BP3

FP14BP2

FP14BP1

FP14BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

0x0010

R

FP17BP3

FP17BP2

FP17BP1

FP17BP0

FP16BP3

FP16BP2

FP16BP1

FP16BP0

LCDRAM

W

Reset

I

I

I

I

I

I

I

I

I = Value is indeterminate