Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario

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Motor Controller (MC10B8CV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
692
Freescale Semiconductor
The motor controller channel frequency of operation can be calculated using the following formula if
DITH = 1:
NOTE
Both equations are only valid if MCPER is not equal to 0. M = 1 for left or
right aligned mode, M = 2 for center aligned mode.
 shows examples of the motor controller channel frequencies that can be generated based on
different peripheral bus clock frequencies and the prescaler value.
NOTE
Due to the selectable slew rate control of the outputs, clipping may occur on
short output pulses.
20.4.4
Output Switching Delay
In order to prevent large peak current draw from the motor power supply, selectable delays can be used to
stagger the high logic level to low logic level transitions on the motor controller outputs. The timing delay,
t
d
, is determined by the CD[1:0] bits in the corresponding channel control register (MCMCx) and is
selectable between 0, 1, 2, or 3 motor controller timer counter clock cycles.
NOTE
A PWM channel gets disabled at the next timer counter overflow without
notice of the switching delay.
Table 20-14. Motor Controller Channel Frequencies (Hz),
MCPER = 256, DITH = 0, MCAM = 10, 01
Prescaler
Peripheral Bus Clock Frequency
16 MHz
10 MHz
8 MHz
5 MHz
4 MHz
1
62500
39063
31250
19531
15625
1/2
31250
19531
15625
9766
7813
1/4
15625
9766
7813
4883
3906
1/8
7813
4883
3906
2441
1953
Motor Channel Frequency (Hz)
f
TC
MCPER M 2
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=