Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manual De Usuario

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Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
84
Freescale Semiconductor
2.3.2
Register Descriptions
The following table summarizes the effect of the various configuration bits, i.e. data direction (DDR),
output level (IO),  pull enable (PE), pull select (PS) on the pin function and pull device activity.
The configuration bit PS is used for two purposes:
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is active.
0x0297
PTURR
R
0
0
0
0
PTURR3
PTURR2
0
0
W
0x0298
PTV
R
PTV7
PTV6
PTV5
PTV4
PTV3
PTV2
PTV1
PTV0
W
0x0299
PTIV
R
PTIV7
PTIV6
PTIV5
PTIV4
PTIV3
PTIV2
PTIV1
PTIV0
W
0x029A
DDRV
R
DDRV7
DDRV6
DDRV5
DDRV4
DDRV3
DDRV2
DDRV1
DDRV0
W
0x029B
Reserved
R
0
0
0
0
0
0
0
0
W
0x029C
PERV
R
PERV7
PERV6
PERV5
PERV4
PERV3
PERV2
PERV1
PERV0
W
0x0294D
PPSV
R
PPSV7
PPSV6
PPSV5
PPSV4
PPSV3
PPSV2
PPSV1
PPSV0
0x029E
SRRV
R
SRRV7
SRRV6
SRRV5
SRRV4
SRRV3
SRRV2
SRRV1
SRRV0
W
0x029F
PTVRR
R
0
0
0
0
PTVRR3
PTVRR2
0
0
W
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented or Reserved